LRS1383 데이터 시트보기 (PDF) - Sharp Electronics

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LRS1383

Stacked Chip 32M Flash and 8M SRAM

Sharp Electronics 

LRS1383

2

1. Description

The LRS1383 is a combination memory organized as 2,097,152 x16 bit flash memory and 524.288 x16 bit static RAM in one

package.

Features

- Power supply

- Operating temperature

••••

••••

2.7V to 3.3V

-25°C to +85°C

- Not designed or rated as radiation hardened

- 72pin CSP (LCSP072-P-0811) plastic package

- Flash memory has P-type bulk silicon, and SRAM has P-type bulk silicon

Flash Memory

- Access Time

••••

- Power supply current (The current for F-VCC pin and F-VPP pin)

Read

••••

Word write

Block erase

Reset Power-Down

••••

••••

••••

85 ns

25 mA

60 mA

30 mA

25 µA

Standby

• • • • 25 µA

- Optimized Array Blocking Architecture

Eight 4K-word Parameter Blocks

Sixty-Three 32K-word Main Blocks

Bottom Parameter Location

- Extended Cycling Capability

100,000 Block Erase Cycles

(F-VPP = 2.7V to 3.3V)

1,000 Block Erase Cycles and total 80 hours (F-VPP = 11.7V to 12.3V)

- Enhanced Automated Suspend Options

Word Write Suspend to Read

Block Erase Suspend to Word Write

Block Erase Suspend to Read

- OTP Block

4 Word + 4 Word Array

(Max.)

(Max. tCYCLE = 200ns, CMOS Input)

(Max.)

(Max.)

(Max. F-RST = GND ± 0.2V,

IOUT (F-RY/BY) = 0mA)

(Max. F-CE = F-RST = F-VCC ± 0.2V)

SRAM

- Access Time

- Power Supply current

Operating current

Standby current

Data retention current

• • • • 70 ns (Max.)

••••

••••

••••

••••

50 mA

8 mA

25 µA

25 µA

(Max. tRC, tWC = Min.)

(Max. tRC, tWC = 1µs, CMOS Input)

(Max.)

(Max. S-VCC = 3.0V)

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