LRS1386 데이터 시트보기 (PDF) - Sharp Electronics

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LRS1386

Stacked Chip 64M Flash Memory and 8M SRAM

Sharp Electronics 

LRS1386

6

3.2 Simultaneous Operation Modes Allowed with Four Planes(1, 2)

THEN THE MODES ALLOWED IN THE OTHER PARTITION IS:

IF ONE

PARTITION IS: Read Read Read

Array ID/OTP Status

Read

Query

Word

Program

Page

Buffer

Program

OTP

Program

Block

Erase

Full

Chip

Erase

Program

Suspend

Block

Erase

Suspend

Read Array

X

X

X

X

X

X

X

X

X

Read ID/OTP

X

X

X

X

X

X

X

X

X

Read Status

X

X

X

X

X

X

X

X

X

X

X

Read Query

X

X

X

X

X

X

X

X

X

Word Program X

X

X

X

X

Page Buffer

Program

X

X

X

X

X

OTP Program

X

Block Erase

X

X

X

X

Full Chip Erase

X

Program

Suspend

X

X

X

X

X

Block Erase

Suspend

X

X

X

X

X

X

X

Notes:

1. "X" denotes the operation available.

2. Configurative Partition Dual Work Restrictions:

Status register reflects partition state, not WSM (Write State Machine) state - this allows a status register for each partition.

Only one partition can be erased or programmed at a time - no command queuing except page buffer program.

Commands must be written to an address within the block targeted by that command.

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