3433EFE 데이터 시트보기 (PDF) - Linear Technology

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3433EFE

High Voltage Step-Up/Step-Down DC/DC Converter

Linear Technology 

TYPICAL PERFOR A CE CHARACTERISTICS

Switch Resistance

vs Temperature (ISW = 500mA)

1.1

1.0

0.9

RSWH

0.8

0.7

RSWL

0.6

0.5

0.4

–50 –25

0 25 50 75

TEMPERATURE (°C)

100 125

3433 G12

VBST Supply Switch Drive Current

vs Temperature (ISW = 500mA)

40

37

34

31

28

25

–50 –25

0 25 50 75

TEMPERATURE (°C)

100 125

3433 G13

LT3433

VOUT Supply Switch Drive Current

vs Temperature (ISW = 500mA)

40

37

34

31

28

25

–50 –25

0 25 50 75

TEMPERATURE (°C)

100 125

3433 G14

PI FU CTIO S

SGND (Pins 1, 8, 9, 16): Low Noise Ground Reference.

VBST (Pin 2): Boosted Switch Supply. This “boosted” sup-

ply rail is referenced to the SW_H pin. Supply voltage is

maintained by a bootstrap capacitor tied from the VBST pin

to the SW_H pin. A 1µF capacitor is generally adequate for

most applications.

The charge on the bootstrap capacitor is refreshed through

a diode, typically connected from the converter output

(VOUT), during the switch-off period. Minimum off-time

operation assures that the boost capacitor is refreshed each

switch cycle. The LT3433 supports operational VBST sup-

ply voltages up to 75V (absolute maximum) as referenced

to ground.

SW_H (Pin 3): Boosted Switch Output. This is the current

return for the boosted switch and corresponds to the emitter

of the switch transistor. The boosted switch shorts the

SW_H pin to the VIN supply when enabled. The drive cir-

cuitry for this switch is boosted above the VIN supply

through the VBST pin, allowing saturation of the switch for

maximum efficiency. The “ON” resistance of the boosted

switch is 0.8Ω.

VIN (Pin 4): Input Power Supply. This pin supplies power

to the boosted switch and corresponds to the collector of

the switch transistor.This pin also supplies power to most

of the IC’s internal circuitry if the VBIAS pin is not driven

externally. This supply will be subject to high switching

transient currents so this pin requires a high quality bypass

capacitor that meets whatever application-specific input

ripple current requirements exist.

BURST_EN (Pin 5): Burst Mode Enable/Disable. When

this pin is below 0.3V, Burst Mode operation is enabled.

Pin input bias current < 1µA when Burst Mode operation

is enabled. If Burst Mode operation is not desired, pulling

this pin above 2V will disable the burst function. When

Burst Mode operation is disabled, typical pin input current

= 35µA. BURST_EN should not be pulled above 20V. This

pin is typically shorted to SGND for Burst Mode function,

or connected to either VBIAS or VOUT to disable Burst Mode

operation.

VC (Pin 6): Error Amplifier Output. The voltage on the VC

pin corresponds to the maximum switch current per oscil-

lator cycle. The error amplifier is typically configured as an

integrator circuit by connecting an RC network from this

pin to ground. This circuit typically creates the dominant

pole for the converter regulation feedback loop. Specific in-

tegrator characteristics can be configured to optimize tran-

sient response. See Applications Information.

3433f

5

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