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LT3513

2MHz High Current 5-Output Regulator for TFT-LCD Panels

Linear Technology 

LT3513

PIN FUNCTIONS

PGOOD (Pin 11): Power Good Comparator Output. This is

the open collector output of the power good comparator

and can be used in conjunction with an external P-chan-

nel MOSFET to provide output disconnect for AVDD as

shown in Figure 2. When switcher 2’s output reaches

approximately 90% of its programmed voltage, PGOOD

will be pulled to ground. This will pull down on the gate

of the MOSFET, connecting AVDD. A 100k pull-up resistor

between the source and the gate of the P-channel MOSFET

keeps it off when switcher 2’s output is low.

VC3 (Pin 12): Control Voltage and Compensation Pin for

Internal Error Amplifier. Connect a series RC from this pin

to ground to compensate switching regulator 3.

CT (Pin 13): Timing Capacitor Pin. This is the input to

the VON timer and programs the time delay from all four

feedback pins reaching 1.125V to VON turning on. The CT

capacitor value can be set using the equation C = (20μA

• tDELAY)/1.1V.

GND (Pins 14, 17, 33): Ground.

SW2 (Pins 15, 16): Switch Node. The SW2 pin is the col-

lector of the internal NPN bipolar transistor for switching

regulator 2. Minimize trace area at this pin to keep EMI

down.

BIAS (Pins 18, 29): The BIAS pin is used to improve ef-

ficiency when operating at higher input voltages. Connect-

ing this pin to the output of switching regulator 1 forces

most of the internal circuitry to draw its operating current

from VLOGIC rather than VIN. The drivers of switches 2, 3,

4 and 5 are supplied by BIAS. Switches 2, 3, 4 and 5 will

not switch until the BIAS pin reaches approximately 2.7V.

Both BIAS pins must be tied to VLOGIC.

FB2 (Pin 19): Feedback Pin. Tie the resistor divider tap

to this pin and set AVDD according to AVDD = 1.23V •

(1 + R5/R6). Reference designators refer to Figure 2.

VC2 (Pin 20): Control Voltage and Compensation Pin for

Internal Error Amplifier. Connect a series RC from this pin

to ground to compensate switching regulator 2.

VC4 (Pin 21): Control Voltage and Compensation Pin for

Internal Error Amplifier. Connect a series RC from this pin

to ground to compensate switching regulator 4.

RUN-SS1 (Pin 22): Run/Soft-Start Pin. This is the soft-start

pin for switching regulator 1. Place a soft-start capacitor

here to limit start-up inrush current and output voltage

ramp rate. When power is applied to the VIN pin, a 2μA

current source charges the capacitor. When the voltage

at this pin reaches 0.8V, switch 1 turns on and begins

switching. For slower start-up use a larger capacitor. For

complete shutdown tie RUN-SS1 to ground.

NFB4 (Pin 23): Negative Feedback Pin. Tie the resistor di-

vider tap to this pin and set VOFF according to VOFF = –1.18 •

(1 + R3/R4). Reference designators refer to Figure 2.

D4 (Pin 24): Internal Schottky Diode Pin. This pin is the

anode of an internal Schottky diode with the other end

connected to ground. This Schottky diode is used in

generating the VOFF output.

SW4 (Pin 25): Switch Node. The SW4 pin is the collector of

the internal NPN bipolar transistor for switching regulator

4. Minimize trace area at this pin to keep EMI down.

BD (Note 26): NPN LDO Base Drive. This pin controls the

base of the external NPN LDO transistor.

LDOPWR (Pin 27): Input Voltage for LDO Driver. This pin

supplies the current for the NPN LDO base. This pin can be

connected to VIN. To save power at high VIN voltages, the

pin can alternatively be connected to the AVDD supply.

BOOST (Pin 28): The BOOST pin is used to provide a

drive voltage higher than VIN to the switch 1 drive circuit.

An internal Schottky diode is connected between BIAS

and BOOST. A capacitor needs to be connected between

BOOST and SW1.

SENSE– (Pin 30) Negative Current Sense Input. This pin

(along with the SENSE+ pin) is used to sense the inductor

current for the buck switching regulator.

3513fa

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