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LT3954IUHE 데이터 시트보기 (PDF) - Linear Technology

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LT3954IUHE Datasheet PDF : 26 Pages
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LT3954
PIN FUNCTIONS
SYNC (Pin 1): Frequency Synchronization Pin. Used to
synchronize the internal oscillator to an outside clock. If
this feature is used, an RT resistor should be chosen to
program a switching frequency 20% slower than SYNC
pulse frequency. Tie the SYNC pin to PWMOUT if this
feature is not used.
EN/UVLO (Pin 2): Enable and Undervoltage Detect Pin. An
accurate 1.22V falling threshold with externally program-
mable hysteresis causes the switching regulator to shut
down when power is insufficient to maintain output regu-
lation. Above the 1.24V (typical) rising enable threshold
(but below 2.5V), EN/UVLO input bias current is sub-μA.
Below the 1.22V (typical) falling threshold, an accurate
2.2μA (typical) pull-down current is enabled so the user
can define the rising hysteresis with the external resistor
selection. An undervoltage condition causes the switch to
turn off and the PWMOUT pin to transition low and resets
soft-start. Tie to 0.4V, or less, to disable the device and
reduce VIN quiescent current below 1μA. Can be tied to
VIN through a 100k resistor.
INTVCC (Pin 3): Current limited, low dropout linear regula-
tor regulates to 7.85V (typical) from VIN. Supplies internal
loads, SW and PWMOUT drivers. Must be bypassed with
a 1µF ceramic capacitor placed close to the pin and to the
exposed pad GND of the IC.
VIN (Pin 6): Power Supply for Internal Loads and INTVCC
Regulator. Must be locally bypassed with a 0.22µF (or
larger) low ESR capacitor placed close to the pin.
GNDK (Pin 12): Kelvin Connection Pin between PGND
and GND. Kelvin connect this pin to the GND plane close
to the IC. See the Board Layout section.
PGND (Pins 13 to 17): Source Terminal Switch and the
GND Input to the Switch Current Comparator.
PWMOUT (Pin 23): Buffered Version of PWM Signal for
Driving LED Load Disconnect NMOS or Level Shift. This
pin also serves in a protection function for the FB over-
voltage condition—will toggle if the FB input is greater
than the FB regulation voltage (VFB) plus 60mV (typical).
The PWMOUT pin is driven from INTVCC. Use of a FET
with gate cut-off voltage higher than 1V is recommended.
FB (Pin 25): Voltage Loop Feedback Pin. FB is intended for
constant-voltage regulation or for LED protection and open
LED detection. The internal transconductance amplifier with
output VC will regulate FB to 1.25V (nominal) through the
DC/DC converter. If the FB input exceeds the regulation
voltage, VFB, minus 50mV and the voltage between ISP
and ISN has dropped below the C/10 threshold of 25mV
(typical), the VMODE pull-down is asserted. This action
may signal an open LED fault. If FB is driven above the
FB overvoltage threshold, the PWMOUT pin will be driven
low and the internal power switch is turned off, to protect
the LEDs from an overcurrent event. Do not leave the FB
pin open. If not used, connect to GND.
ISN (Pin 27): Connection Point for the Negative Terminal
of the Current Feedback Resistor. The constant output
current regulation can be programmed by ILED = 250mV/
RLED when CTRL > 1.2V or ILED = (CTRL – 100mV)/(4 •
RLED). If ISN is greater than INTVCC, input bias current
is typically 20μA flowing into the pin. Below INTVCC, ISN
bias current decreases until it flows out of the pin.
ISP (Pin 28): Connection Point for the Positive Terminal of
the Current Feedback Resistor. Input bias current depends
upon CTRL pin voltage. When it is greater than INTVCC it
flows into the pin. Below INTVCC, ISP bias current decreases
until it flows out of the pin. If the difference between ISP
and ISN exceeds 600mV (typical), then an overcurrent
event is detected. In response to this event, the switch is
turned off and the PWMOUT pin is driven low to protect
the switching regulator, a 1.5mA pulldown on PWM and
a 9mA pulldown on the DIM/SS pin are activated for 4µs.
VC (Pin 30): Transconductance Error Amplifier Output
Pin Used to Stabilize the Switching Regulator Control
Loop with an RC Network. The VC pin is high impedance
when PWM is low. This feature allows the VC pin to store
the demand current state variable for the next PWM high
transition. Connect a capacitor between this pin and GND;
a resistor in series with the capacitor is recommended for
fast transient response.
3954fa
8
For more information www.linear.com/3954

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