LT3956 데이터 시트보기 (PDF) - Linear Technology
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LT3956 Datasheet PDF : 20 Pages
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LT3956
Pin Functions
VREF: Voltage Reference Output Pin (typically 2V). This
pin drives a resistor divider for the CTRL pin, either for
analog dimming or for temperature limit/compensation
of LED load. Can supply up to 100μA.
PWM: A signal low turns off switcher, idles oscillator and
disconnects VC pin from all internal loads. PWMOUT pin
follows PWM pin. PWM has an internal pull-down resistor.
If not used, connect to INTVCC.
VMODE: An open-collector pull-down on VMODE asserts
if the FB input is greater than the FB regulation threshold
minus 50mV (typical). To function, the pin requires an
external pull-up resistor. When the PWM input is low
and the DC/DC converter is idle, the VMODE condition is
latched to the last valid state when the PWM input was
high. When PWM input goes high again, the VMODE pin
will be updated. This pin may be used to report an open
LED fault. Use a pull-up current less than 1mA.
SS: Soft-Start Pin. This pin modulates oscillator fre-
quency and compensation pin voltage (VC) clamp. The
soft-start interval is set with an external capacitor. The
pin has a 10µA (typical) pull-up current source to an
internal 2.5V rail. The soft-start pin is reset to GND by
an undervoltage condition (detected by EN/UVLO pin)
or thermal limit.
RT: Switching Frequency Adjustment Pin. Set the fre-
quency using a resistor to GND (for resistor values, see
the Typical Performance curve or Table 1). Do not leave
the RT pin open.
Block Diagram
EN/UVLO – A6
1.22V +
2.1µA
FB
SHDN
VC
–
1.31V
+
OVFB
COMPARATOR
PWMOUT PWM
1.25V
– LDO
+A8
VIN
7.15V INTVCC
1.25V
+ A5
–gm
10µA AT
FB = 1.25V
SW
SHORT-CIRCUIT
DETECT
+
–+ 350mV
–A10
ISN
SCILMB
gm
+ EAMP
ISP
5k
–A1
CTRL
CTRL
+ BUFFER
1.1V +–A3
Q2
VREF
–
+A7
2V
20k
140µA
FAULT
LOGIC
TSD
165°C
170k
10µA
10µA AT
A1+ = A1–
SCILMB
+
–A2 PWM
COMPARATOR
VC
SSCLAMP
RAMP
GENERATOR
10µA
1.25V
100kHz TO 1MHz
OSCILLATOR
+
+– FREQ
PROG
RQ
S
DRIVER
ISENSE
A4
–
1.2V
FB +
PGND
GND
VMODE
1mA (MAX)
SS
RT
3956f
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