LCX038AST
2. Clock timing conditions (Ta = 25°C)
(XGA mode: fHckn = 3.9MHz, fVck = 34.3kHz)
Item
Symbol Min.
HST
HCK
Hst rise time
Hst fall time
Hst data set-up time
Hst data hold time
Hckn rise time∗5
Hckn fall time∗5
Hck1 fall to Hck2 rise time
Hck1 rise to Hck2 fall time
Vst rise time
trHst
—
tfHst
—
tdHst
55
thHst
55
trHckn
—
tfHckn
—
to1Hck –15
to2Hck –15
trVst
—
Vst fall time
VST
Vst data set-up time
tfVst
—
tdVst
2
VCK
Vst data hold time
Vck rise time
Vck fall time
Enb rise time
Enb fall time
thVst
2
trVck
—
tfVck
—
trEnb
—
tfEnb
—
Horizontal video period completed to Enb fall time tdEnb
760
ENB
Enb rise to PRG∗4 fall time
toPRG∗4 110
PCG
Enb fall to Pcg rise time
Enb pulse width
Pcg rise time
Pcg fall time
Pcg rise to Vck rise/fall time
toPcg
twEnb
trPcg
tfPcg
toVck
830
1650
—
—
–100
Pcg fall to horizontal video period start time
Pcg pulse width
PRG∗4 rise to Pcg rise time
PRG∗4 PRG∗4 fall to Pcg fall time
PRG∗4 pulse width
Blk rise time
BLK∗6 Blk fall time
Blk rise to Enb fall time
Blk fall to Pcg rise time
toVideo
twPcg
toPcgr
toPcgf
twPRG∗4
trBlk
tfBlk
toEnb
toPcg
170
1400
–10
570
830
—
—
2
–1
∗5 Hckn means Hck1 and Hck2.
∗6 Blk is the timing during PC98 mode, which keeps "H" level in other modes.
Typ.
—
—
65
65
—
—
0
0
—
—
7
7
—
—
—
—
800
120
1000
—
—
—
0
200
1700
0
700
1000
—
—
1
0
Max. Unit
30
30
75
75
30
ns
30
15
15
100
100
12
µs
12
100
100
100
100
—
130
—
—
30
ns
30
100
—
—
10
—
—
100
100
0
µs
1
–7–