LTC1096(RevB) 데이터 시트보기 (PDF) - Linear Technology
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LTC1096 Datasheet PDF : 28 Pages
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TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Clock Frequency vs
Source Resistance
1
TA = 25°C
VCC = VREF = 5V
VIN
+ INPUT
0.75
– INPUT
RSOURCE–
0.50
0.25
0
1
10
100
RSOURCE– (kΩ)
LTC1096/98 • TPC10
Wake-Up Time vs Supply Voltage
4
TA = 25°C
VREF = 2.5V
3
Maximum Clock Frequency vs
Supply Voltage
1.5
TA = 25°C
1.25 VREF = 2.5V
1.0
0.75
0.5
0.25
0
0
2
4
6
8
10
SUPPLY VOLTAGE (V)
LTC1096/98 • TPC11
Minimum Wake-Up Time
vs Source Resistance
10
TA = 25°C
VREF = 5V
7.5
2
5.0
RSOURCE+
VIN
+
1
2.5
–
0
0
0
2
4
6
8
10
1
SUPPLY VOLTAGE, VCC (V)
LTC1096/98 • TPC13
10
RSOURCE (kΩ)
100
LTC1096/98 • TPC14
Minimum Clock Frequency for
0.1LSB Error† vs Temperature
ENOBs vs Frequency
200
10
180
VREF = 5V
VCC = 5V
9
160
8
140
7
120
6
100
5
80
4
60
3
40
2 TA = 25°C
20
1
VCC = VREF = 5V
fSMPL = 31.25kHz
0
0
–60 –40 –20 0 20 40 60 80 100 120 140
1
10
100
TEMPERATURE (°C)
FREQUENCY (kHz)
LTC1096/98 • TPC16
* Maximum CLK frequency represents the clock frequency at which a 0.1LSB shift in the error at any code
LTC1096/98 • TPC17
transition from its 0.75MHz value is first detected.
† As the CLK frequency is decreased from 500kHz, minimum CLK frequency (∆error ≤ 0.1LSB) represents
the frequency at which a 0.1LSB shift in any code transition from its 500kHz value is first detected.
LTC1096/LTC1096L
LTC1098/LTC1098L
Digital Input Logic Threshold
vs Supply Voltage
5
TA = 25°C
4
3
2
1
0
0
2
4
6
8
10
SUPPLY VOLTAGE, VCC (V)
LTC1096/98 • TPC12
Input Channel Leakage Current
vs Temperature
1000
100
VREF = 5V
VCC = 5V
10
ON CHANNEL
1
OFF CHANNEL
0.1
0.01
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
LTC1096/98 • TPC15
FFT Plot
0
–10
– 20
– 30
TA = 25°C
VCC = VREF = 5V
fSMPL = 31.25kHz
fIN = 5.8kHz
– 40
– 50
– 60
– 70
– 80
– 90
–100
0 2 4 6 8 10 12 14 16
FREQUENCY (kHz)
LTC1096/98 • TPC18
9
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