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LTC2915 데이터 시트보기 (PDF) - Linear Technology

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LTC2915 Datasheet PDF : 12 Pages
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LTC2915/LTC2916
PIN FUNCTIONS (TSOT/DFN)
GND (Pin 4/Pin 1): Device Ground.
MR (Pin 3/Pin 2) (LTC2916 only): Manual Reset Input
(Active Low). A low level on the MR input causes the part
to issue a reset, which is released one reset timeout after
the input goes high. The pin has an internal 100k pull-up
to VCC, and thus may interface directly to a momentary
pushbutton. Leave open if unused.
RST (Pin 5/Pin 8): Open Drain RST Output. Asserts low
when VM is below the threshold selected by SEL1, SEL2
and TOL input pins. Held low for an adjustable timeout
after VM input is above threshold.
RT (Pin 6/Pin 7): Reset Timeout Control Pin. Attach an
external Capacitor (CRT) to GND to set a reset timeout of
9ms/nF. Floating RT generates a reset timeout of approxi-
mately 400μs. Tie RT to VCC to generate a reset timeout
of approximately 200ms.
SEL1, SEL2 (Pins 2, 7/Pins 3, 6): Monitor Voltage Select
Three-State Inputs. SEL1 and SEL2 control the nominal
threshold voltage that VM is set to monitor. Connect to VCC,
GND or leave unconnected in open state. (See Table 1).
TOL (Pin 3/Pin 2) (LTC2915 only): Three-State Input
for Supply Tolerance Selection (–5%, –10% or –15%).
Controls the tolerance band at which the VM supply is
monitored. Connect to VCC, GND, or leave unconnected
in open state. (See Table 2).
VCC (Pin 8/Pin 5): Power Supply Input. Bypass this pin
to ground with a 0.1μF ceramic capacitor. A minimum of
1.5V on VCC ensures that the part is out of under voltage
lockout and that the voltage thresholds are accurate.
Operates as a direct supply input for voltages up to 5.5V.
Operates as a shunt regulator for supply voltages greater
than 5.7V and should have a resistor between this pin and
the supply to limit VCC input current to no greater than
5mA. When used without a current-limiting resistor, pin
voltage must not exceed 5.7V.
VM (Pin 1/Pin 4): Voltage Monitor Input to RST Compara-
tor. SEL1, SEL2 and TOL inputs select the exact threshold
that asserts the RST output.
Exposed Pad (Pin 9, DFN Only): Exposed Pad may be left
open or connected to device ground.
BLOCK DIAGRAM
LTC2915
SEL1 SEL2 TOL
3 STATE
DECODE
VM
MONITOR
DIVIDER
MATRIX
+
–+ 0.5V
REFERENCE
DIVIDER
MATRIX
LTC2916
MR
VCC
100k
RT
VCC DETECT
VCC
VCC
6.2V
INTERNAL
200ms TIMER
ADJUSTABLE
RESET TIMER
RST
RESET
DRIVER LOGIC
GND
29156 BD
29156fa
6

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