LTM4601 데이터 시트보기 (PDF) - Linear Technology

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LTM4601

6A, 28VIN DC/DC µModule with PLL, Output Tracking and Margining

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LTM4603HV

PI FU CTIO S (See Package Description for Pin Assignment)

VIN (Bank 1): Power Input Pins. Apply input voltage be-

tween these pins and PGND pins. Recommend placing

input decoupling capacitance directly between VIN pins

and PGND pins.

VOUT (Bank 3): Power Output Pins. Apply output load

between these pins and PGND pins. Recommend placing

output decoupling capacitance directly between these pins

and PGND pins. Review the figure below.

PGND (Bank 2): Power ground pins for both input and

output returns.

VOSNS– (Pin M12): (–) Input to the Remote Sense Amplifier.

This pin connects to the ground remote sense point. The

remote sense amplifier is used for VOUT ≤3.3V.

VOSNS+ (Pin J12): (+) Input to the Remote Sense Amplifier.

This pin connects to the output remote sense point. The

remote sense amplifier is used for VOUT ≤3.3V.

DIFFVOUT (Pin K12): Output of the Remote Sense Ampli-

fier. This pin connects to the VOUT_LCL pin.

DRVCC (Pin E12): This pin normally connects to INTVCC

for powering the internal MOSFET drivers. This pin can

be biased up to 6V from an external supply with about

50mA capability, or an external circuit shown in Figure

16. This improves efficiency at the higher input voltages

by reducing power dissipation in the modules.

INTVCC (Pin A7): This pin is for additional decoupling of

the 5V internal regulator.

PLLIN (Pin A8): External Clock Synchronization Input to

the Phase Detector. This pin is internally terminated to

SGND with a 50k resistor. Apply a clock above 2V and

below INTVCC. See Applications Information.

TRACK/SS (Pin A9): Output Voltage Tracking and Soft-

Start Pin. When the module is configured as a master

output, then a soft-start capacitor is placed on this pin

to ground to control the master ramp rate. A soft-start

capacitor can be used for soft-start turn on as a stand

alone regulator. Slave operation is performed by putting

a resistor divider from the master output to the ground,

and connecting the center point of the divider to this pin.

See Applications Information.

MPGM (Pin A12): Programmable Margining Input. A re-

sistor from this pin to ground sets a current that is equal

to 1.18V/R. This current multiplied by 10kΩ will equal a

value in millivolts that is a percentage of the 0.6V refer-

ence voltage. See Applications Information. To parallel

LTM4603HVs, each requires an individual MPGM resistor.

Do not tie MPGM pins together.

fSET (Pin B12): Frequency Set Internally to 1MHz. An

external resistor can be placed from this pin to ground

to increase frequency. This pin can be decoupled with a

1000pF capacitor. See Applications Information for fre-

quency adjustment.

VFB (Pin F12): The Negative Input of the Error Ampli-

fier. Internally, this pin is connected to VOUT_LCL with a

60.4k precision resistor. Different output voltages can be

programmed with an additional resistor between VFB and

SGND pins. See Applications Information.

TOP VIEW

A

VIN

BANK 1

B

C

fSET

MARG0

D

MARG1

E

PGND

BANK 2

F

G

DRVCC

VFB

PGOOD

H

J

VOUT K

BANK 3 L

M

SGND

VOSNS+

DIFFVOUT

VOUT_LCL

VOSNS–

1 2 3 4 5 6 7 8 9 10 11 12

4603hvf

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