LV5761V 데이터 시트보기 (PDF) - SANYO -> Panasonic
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LV5761V Datasheet PDF : 6 Pages
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Block Diagram
LV5761V
VIN 14
MODE 12
OCP 13
5V
REGULATOR
5µA
1.25V
+
-
OCP Comp1
REFERENCE
VOLTAGE
OSP
LOGIC
ILIM 15
MODE L 20µA
MODE H 40µA
5µA
-
+
OCP Comp2
VCC +
-
Current Amp
SQ
R
SD
1.1V
SS 16
0.67V
++
FB 1
-
COMP 2
+
- SD
SQ
R
SAW WAVE
OSCILLATOR
fosc forced
1/3
DMAX = 90%
1.0V
0.5V
+
-
0.1V
FFOLD
Comp
45
RT SYNC
UVLO
-
+
PWM Comp
CONTROL
5V
Logic
shut down(SD)
7 CBOOT
8 HDRV
6 SW
10 VDD
9 LDRV
11 GND
3
EN
Pin Function
Pin No. Pin name
14
VIN
11
GND
10
VDD
7
CBOOT
6
SW
5
SYNC
9
LDRV
8
HDRV
1
FB
2
COMP
16
SS
15
ILIM
3
EN
13
OCP
4
RT
12
MODE
Description
Power supply pin. This pin is monitored by UVLO function. When the voltage of this pin becomes 8V or more by UVLO function,
The IC starts and the soft start function operates.
Ground pin. Each reference voltage is based on the voltage of the ground pin.
Power supply pin for an external the lower MOS-FET gate drive.
Bootstrap capacity connection pin. This pin becomes a GATE drive power supply of an external NchMOSFET.
Connect a bypath capacitor between CBOOT and SW.
Pin to connect with switching node. The source of NchMOSFET connects to this pin.
External synchronous signal input pin.
An external the lower MOSFET gate drive pin.
An external the upper MOSFET gate drive pin.
Error amplifier reverse input pin. By operating the converter, the voltage of this pin becomes 0.67V.
The voltage in which the output voltage is divided by an external resistance is applied to this pin. Moreover, when this pin
voltage becomes 0.1V or less after a soft start ends, the oscillatory frequency becomes 1/3.
Error amplifier output pin. Connect a phase compensation circuit between this pin and GND.
Pin to connect a capacitor for soft start. A capacitor for soft start is charged by using the voltage of about 5µA.
This pin ends the soft start period by using the voltage of about 1.1V and the frequency fold back function becomes active.
Reference current pin for current detection.
The sink current of about 20µA flows to this pin when Low level (GND) is set to the MODE pin.
Also, the sink current of about 40µA flows to this pin when High level (VIN) is set to the MODE pin.
When a resistance is connected between this pin and VIN outside and the voltage applied to the SW pin is lower than the
voltage of the terminal side of the resistance, the upper NchMOSFET is off by operating the current limiter comparator.
This operation is reset with respect to each PWM pulse.
ON/OFF pin.
Pin to set the time of the timer (during double the over current detection point)
Connect a capacitor between this pin and GND. OCP charge current : 5µA
Pin to set the oscillation frequency. Connect a resistance between this pin and GND.
Pin to switch the over current detection point. Set by the low level (GND) of the ILIM pin.
Set by the high level (VIN) of the OCP pin.
When this MODE pin is set to the high level and the point of the over current detection is set by using the ILIM pin is exceeded,
the value becomes double the original value.
Also, when the MODE pin is set to the low level, the point of the over current detection remains an original value.
No.A1443-4/6
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