LXT972ALC 데이터 시트보기 (PDF) - Intel

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LXT972ALC

3.3V Dual-Speed Fast Ethernet Transceiver

Intel 

3.3V Dual-Speed Fast Ethernet Transceiver Datasheet — LXT972A

Revision History

Revision

002

Date

January 2001

Description

Clock Requirements: Modified language under Clock Requirements heading.

I/O Characteristics REFCLK (table): Changed values for Input Clock Duty

Cycle under Min from 40 to 35 and under Max from 60 to 65.

Datasheet

7

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