M25P80-VMW3 데이터 시트보기 (PDF) - STMicroelectronics

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M25P80-VMW3

8 Mbit, Low Voltage, Serial Flash Memory With 40MHz SPI Bus Interface

STMicroelectronics 

M25P80

Read Data Bytes (READ)

The device is first selected by driving Chip Select

(S) Low. The instruction code for the Read Data

Bytes (READ) instruction is followed by a 3-byte

address (A23-A0), each bit being latched-in during

the rising edge of Serial Clock (C). Then the mem-

ory contents, at that address, is shifted out on Se-

rial Data Output (Q), each bit being shifted out, at

a maximum frequency fR, during the falling edge of

Serial Clock (C).

The instruction sequence is shown in Figure 13..

The first byte addressed can be at any location.

The address is automatically incremented to the

next higher address after each byte of data is shift-

ed out. The whole memory can, therefore, be read

with a single Read Data Bytes (READ) instruction.

When the highest address is reached, the address

counter rolls over to 000000h, allowing the read

sequence to be continued indefinitely.

The Read Data Bytes (READ) instruction is termi-

nated by driving Chip Select (S) High. Chip Select

(S) can be driven High at any time during data out-

put. Any Read Data Bytes (READ) instruction,

while an Erase, Program or Write cycle is in

progress, is rejected without having any effects on

the cycle that is in progress.

Figure 13. Read Data Bytes (READ) Instruction Sequence and Data-Out Sequence

S

0 1 2 3 4 5 6 7 8 9 10 28 29 30 31 32 33 34 35 36 37 38 39

C

Instruction

24-Bit Address

D

23 22 21 3 2 1 0

MSB

High Impedance

Q

Data Out 1

Data Out 2

76543 2107

MSB

AI03748D

Note: Address bits A23 to A20 are Don’t Care.

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