M25PE10 데이터 시트보기 (PDF) - STMicroelectronics

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M25PE10

1 and 2 Mbit, low voltage, Page-Erasable Serial Flash memories with Byte-Alterability, 50 MHz SPI bus, standard pinout

STMicroelectronics 

M25PE20, M25PE10

Description

Figure 1. Logic diagram - previous T7X Figure 2. Logic diagram - new T9HX

process

process

VCC

VCC

D

C

S

TSL

Reset

Q

M25PE20

M25PE10

D

C

S

W

Reset

Q

M25PE10

M25PE20

VSS

AI09713

VSS

AI13808

Table 1. Signal names

Signal name

Function

Direction

C

Serial Clock

Input

D

Serial Data Input

Input

Q

Serial Data Output

Output

S

TSL or W(1)

Chip Select

Top Sector Lock or Write Protect

Input

Input

Reset

Reset

Input

VCC

Supply Voltage

VSS

Ground

1. In the previous T7X process the pin is a Top Sector Lock input whereas in the new T9HX process, the pin

is a Write Protect input (see Figure 1 and Figure 2).

Figure 3. VFQFPN and SO connections

M25PE20

M25PE10

S1

Q2

TSL or W 3

VSS 4

8 VCC

7 Reset

6C

5D

AI09715b

1. There is an exposed central pad on the underside of the VFQFPN package. This is pulled, internally, to

VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB.

2. See Package mechanical section for package dimensions, and how to identify pin-1.

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