M28W320CT09GB1T 데이터 시트보기 (PDF) - STMicroelectronics

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M28W320CT09GB1T

32 Mbit (2Mb x16, Boot Block) Low Voltage Flash Memory

STMicroelectronics 

M28W320CT, M28W320CB

Table 2. Absolute Maximum Ratings (1)

Symbol

Parameter

Value

Unit

TA

Ambient Operating Temperature (2)

–40 to 85

°C

TBIAS

Temperature Under Bias

–40 to 125

°C

TSTG

Storage Temperature

–55 to 155

°C

VIO

Input or Output Voltage

–0.6 to VDDQ+0.6

V

VDD, VDDQ

Supply Voltage

–0.6 to 4.1

V

VPP

Program Voltage

–0.6 to 13

V

Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions

above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-

tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-

ity documents.

2. Depends on range.

DESCRIPTION

The M28W320C is a 32 Mbit non-volatile Flash

memory that can be erased electrically at the block

level and programmed in-system on a Word-by-

Word basis. The device is offered in the TSOP48

(10 x 20mm) and the µBGA47, 0.75mm ball pitch

packages. When shipped, all bits of the

M28W320C are in the 1 state.

The array matrix organisation allows each block to

be erased and reprogrammed without affecting

other blocks. All blocks are protected against pro-

gramming and erase at Power UP. Blocks can be

unprotected to make changes in the application

and then reprotected. A parameter block ”Security

Block” can be permanently protected against pro-

gramming and erase in order to increase the data

security. Each block can be programmed and

erased over 100,000 cycles. VDDQ allows to drive

the I/O pin down to 1.65V. An optional 12V VPP

power supply is provided to speed up the program

phase at customer production line environment.

An internal Command Interface (C.I.) decodes the

instructions to access/modify the memory content.

The Program/Erase Controller (P/E.C.) automati-

cally executes the algorithms taking care of the

timings necessary for program and erase opera-

tions. Verification is performed too, unburdening

the microcontroller, while the Status Register

tracks the status of the operation.

The following instructions are executed by the

M28W320C: Read Array, Read Electronic Signa-

ture, Read Status Register, Clear Status Register,

Program, Double Word Program, Block Erase,

Program/Erase Suspend, Program/Erase Re-

sume, CFI Query, Block Protect, Block Lock, Block

Unprotect, Protection Program.

Organisation

The M28W320C is organised as 2 Mbit by 16 bits.

A0-A20 are the address lines; DQ0-DQ15 are the

Data Input/Output. Memory control is provided by

Chip Enable E, Output Enable G and Write Enable

W inputs. The Program and Erase operations are

managed automatically by the P/E.C. Block pro-

tection against Program or Erase provides addi-

tional data security.

Memory Blocks

The device features an asymmetrical blocked ar-

chitecture. The M28W320C has an array of 71

blocks: 8 Parameter Blocks of 4 KWord and 63

Main Blocks of 32 KWord. M28W320CT has the

Parameter Blocks at the top of the memory ad-

dress space while the M28W320CB locates the

Parameter Blocks starting from the bottom. The

memory maps are shown in Tables 3 and 4.

All Blocks are protected at power up. Instruction

are provided to protect, unprotect any block in the

application. A second register locks the protection

status while WP is low (see Block Protection De-

scription). Each block can be erased separately.

Erase can be suspended in order to perform either

read or program in any other block and then re-

sumed. Program can be suspended to read data in

any other block and then resumed.

The architecture includes a 128 bits Protection

register that are divided into Two 64-bits segment.

In the first one, starting from address 81h to 84h,

is written a unique device number, while the sec-

ond one, starting from 85h to 88h, is programma-

ble by the user. The user programmable segment

can be permanently protected programming the

bit.1 of the Protection Lock Register (see protec-

tion register and Security Block). The parameter

block (# 0) is a security block. It can be permanent-

ly protected by the user programming the bit.2 of

the Protection Lock Register (see protection regis-

ter and Security Block).

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