HP3103 데이터 시트보기 (PDF) - Fairchild Semiconductor
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HP3103 Datasheet PDF : 7 Pages
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HPLR3103, HPLU3103
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
RθJC
R θ JA
(PCB Mount Steady State)
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
Continuous Source to Drain Current
Pulsed Source to Drain Current (Note 2)
I SD
MOSFET
Symbol Showing
D
I SDM
The Integral
Reverse P-N
Junction Diode
G
S
Source to Drain Diode Voltage (Note 3)
V SD
ISD = 28A
Reverse Recovery Time (Note 3)
trr
ISD = 34A, dISD/dt = 100A/µs
Reverse Recovered Charge (Note 3)
Q RR
ISD = 34A, dISD/dt = 100A/µs
NOTES:
2. Repetitive rating; pulse width limited by maximum junction temperature (See Figure 11).
3. Pulse width ≤ 300µs; duty cycle ≤ 2%.
4. VDD = 15V, starting TJ = 25oC, L = 300µH, RG = 25Ω, peak IAS = 34A, (Figure 10).
MIN TYP
-
-
-
-
-
-
MAX
1.4
110
50
UNITS
oC/W
oC/W
oC/W
MIN TYP MAX UNITS
-
- 52 (Note A
1)
-
-
220
A
-
-
1.3
V
-
81
120
ns
-
210
310
nC
Typical Performance Curves
1000
100
VGS IN DECENDING ORDER
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
2.5V
10
20µs PULSE WIDTH
TC = 25oC
1
0.1
1.0
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 1. OUTPUT CHARACTERISTICS
1000
100
VGS IN DECENDING ORDER
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
2.5V
10
20µs PULSE WIDTH
TC = 150oC
1
0.1
1
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 2. OUTPUT CHARACTERISTICS
©2001 Fairchild Semiconductor Corporation
HPLR3103, HPLU3103 Rev. B
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