M2V56S20TP 데이터 시트보기 (PDF) - Mitsumi
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M2V56S20TP Datasheet PDF : 49 Pages
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SDRAM (Rev.1.1)
Single Data Rate
Feb.2000
MITSUBISHI LSIs
M2V56S20/ 30/ 40/ TP -6, -7, -8
256M Synchronous DRAM
COMMAND TRUTH TABLE
COMMAND
MNEMONIC CKE CKE /CS /RAS /CAS /WE BA0,1 A10 A0-9, note
n-1 n
/AP 11-12
Deselect
No Operation
Row Address Entry &
Bank Activate
DESEL
NOP
ACT
H
X
H
X
X
X
X
X
X
H
X
L
H
H
H
X
X
X
H
X
L
L
H
H
V
V
V
Single Bank Precharge
Precharge All Banks
Column Address Entry
& Write
PRE
PREA
WRITE
H
X
L
L
H
L
V
L
X
H
X
L
L
H
L
X
H
X
H
X
L
H
L
L
V
L
V
Column Address Entry
& Write with
WRITEA
H
X
L
H
L
L
V
H
V
Auto-Precharge
Column Address Entry
& Read
READ
H
X
L
H
L
H
V
L
V
Column Address Entry
& Read with
Auto-Precharge
READA
H
X
L
H
L
H
V
H
V
Auto-Refresh
Self-Refresh Entry
Self-Refresh Exit
Burst Terminate
Mode Register Set
REFA
REFS
REFSX
TBST
MRS
H
H
L
L
L
H
X
X
X
H
L
L
L
L
H
X
X
X
L
H
H
X
X
X
X
X
X
L
H
L
H
H
H
X
X
X
H
X
L
H
H
L
X
X
X
H
X
L
L
L
L
L
L
V1
H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number
NOTE:
1. A7-9,11-12=L, A0-A6 =Mode Address
MITSUBISHI ELECTRIC
6
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