M2V56S20TP 데이터 시트보기 (PDF) - Mitsumi

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M2V56S20TP

256M Synchronous DRAM

Mitsumi 

SDRAM (Rev.1.1)

Single Data Rate

Feb.2000

MITSUBISHI LSIs

M2V56S20/ 30/ 40/ TP -6, -7, -8

256M Synchronous DRAM

FUNCTION TRUTH TABLE (continued)

Current State /CS /RAS /CAS /WE Address

PRE -

H

X

X

XX

CHARGING L

H

H

HX

L

H

H

LX

L

H

L

X BA, CA, A10

L

L

H

H BA, RA

L

L

H

L BA, A10

L

L

L

HX

Op-Code,

L

L

L

L

Mode-Add

ROW

H

X

X

XX

ACTIVATING L

H

H

HX

L

H

H

LX

L

H

L

X BA, CA, A10

L

L

H

H BA, RA

L

L

H

L BA, A10

L

L

L

HX

Op-Code,

L

L

L

L

Mode-Add

WRITE RE- H

X

X

XX

COVERING L

H

H

HX

L

H

H

LX

L

H

L

X BA, CA, A10

L

L

H

H BA, RA

L

L

H

L BA, A10

L

L

L

HX

Op-Code,

L

L

L

L

Mode-Add

Command

Action

DESEL NOP (Idle after tRP)

NOP

NOP (Idle after tRP)

TBST

ILLEGAL*2

READ / WRITE ILLEGAL*2

ACT

ILLEGAL*2

PRE / PREA NOP*4 (Idle after tRP)

REFA

ILLEGAL

MRS

ILLEGAL

DESEL NOP (Row Active after tRCD)

NOP

NOP (Row Active after tRCD)

TBST

ILLEGAL*2

READ / WRITE ILLEGAL*2

ACT

ILLEGAL*2

PRE / PREA ILLEGAL*2

REFA

ILLEGAL

MRS

ILLEGAL

DESEL NOP

NOP

NOP

TBST

ILLEGAL*2

READ / WRITE ILLEGAL*2

ACT

ILLEGAL*2

PRE / PREA ILLEGAL*2

REFA

ILLEGAL

MRS

ILLEGAL

MITSUBISHI ELECTRIC

9

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