M59BW102 데이터 시트보기 (PDF) - STMicroelectronics
부품명
상세내역
제조사
M59BW102 Datasheet PDF : 24 Pages
| |||
M59BW102
Table 11. DC Characteristics
(TA = 0 to 70°C; VCC = 3.0V to 3.6V)
Symbol
Parameter
ILI Input Leakage Current
ILO Output Leakage Current
ICC1 Supply Current (Read)
ICC2 Supply Current (Standby)
ICC3 (1) Supply Current (Program or Erase)
VIL Input Low Voltage
VIH Input High Voltage
VOL Output Low Voltage
VOH Output High Voltage
VID A9, E, G High Voltage
IID A9, E, G High Current
VLKO (1)
Supply Voltage (Erase and Program
lock-out)
Note: 1. Sampled only, not 100% tested.
Test Condition
0V ≤ VIN ≤ VCC
0V ≤ VOUT ≤ VCC
E = VIL, G = VIH, f = 6MHz
ALE, E = VCC ± 0.2V
Byte program or
Chip Erase in progress
IOL = 1.8mA
IOh = –100µA
A9, E, G = VID
Min
Max
Unit
±1
µA
±1
µA
10
mA
100
µA
20
mA
–0.5
0.8
V
2
VCC + 0.3 V
0.45
V
VCC – 0.4V
V
11.5
12.5
V
100
µA
1.8
2.3
V
Table 12. Sequential Read Mode AC Characteristics
(TA = 0 to 70°C)
M59BW102
Symbol Alt
Parameter
Test Condition
25
VCC = 3.0V to 3.6V
Min Typ Max
tCYCLE tCY Sequential Cycle
E = VIL, ALE = VIL 25
tGHGL tGW Output Enable High to Output Enable Low
G = Pulse
13
tGLGH
tGL Output Enable Low to Output Enable High
G = Pulse
12
tGHEL tATT Output Enable High to Chip Enable Low
–2
tGHEH tSBY Output Enable High to Chip Enable High
–2
tEHALH
tAV
Chip Enable High to Address Latch Enable
High
3
tGHALH
tGS
Output Enable High to Address Latch
Enable High (following cycle)
0
tGHQV (1) tGACC Output Enable High to Output Valid
20
tELQV (1) tEACC Chip Enable Low to Output Valid
20
tEHQZ tEDF Chip Enable High to Output Hi-Z
12
tALHQZ tADF Address Latch Enable High to Output Hi-Z
20
Note: 1. This timing refers to a Load Capacitance (CL) of 30pF. If CL is higher, add 1 ns for each extra 10pF.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10/24
Share Link: 