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M61533FP 데이터 시트보기 (PDF) - Renesas Electronics

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M61533FP
Renesas
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M61533FP Datasheet PDF : 13 Pages
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M61533FP
Relationship Between Data and Clock
When DATA is "H", latch signal is
created at the falling edge of CLOCK.
CLOCK
D0
D1
D2
D3
DATA
Data signal is read at the rising edge of CLOCK.
Clock and Data Timings
(D0 D15)
t cr
CLOCK
D13
D14
D15
Make "H" at the timing which
DATA of D0-D15 make latch.
LATCH
75%
DATA
25%
tr
tSLD tHLD tSHD tHHD
tWHC
tf
tWLC
tSLD tHLD
Rev.1.0, Sep.19.2003, page 5 of 12

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