M88 데이터 시트보기 (PDF) - STMicroelectronics
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M88 Datasheet PDF : 7 Pages
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M88 FAMILY
Figure 2A. PLCC Connections
Figure 2B. PQFP Connections
PD2
8
PD1
9
PD0
10
PC7
11
PC6
12
PC5
13
PC4
14
VCC
15
GND
16
PC3
17
PC2
18
PC1
19
PC0
20
46
AD15
45
AD14
44
AD13
43
AD12
42
AD11
41
AD10
40
AD9
39
AD8
38
VCC
37
AD7
36
AD6
35
AD5
34
AD4
AI02857
PD2 1
PD1 2
PD0 3
PC7 4
PC6 5
PC5 6
PC4 7
VCC 8
GND 9
PC3 10
PC2 11
PC1 12
PC0 13
39 AD15
38 AD14
37 AD13
36 AD12
35 AD11
34 AD10
33 AD9
32 AD8
31 VCC
30 AD7
29 AD6
28 AD5
27 AD4
AI02858
Programmability (ISP) to Flash memory and
programmable logic. The result is a simple and
flexible solution for embedded designs.
FLASH+PSD devices combine many of the
peripheral functions found in MCU based
applications. FLASH+PSD provides a glueless
interface to most commonly-used ROMless
MCUs.
Table 2 summarizes all the devices in the M88
Family.
The CPLD in the FLASH+PSD devices features
an optimized Macrocell logic architecture. The
Macrocell was created to address the unique
requirements of embedded system designs. It
allows direct connection between the system
address/data bus, and the internal FLASH+PSD
registers, to simplify communication between the
MCU and other supporting devices.
The FLASH+PSD device includes a JTAG Serial
Programming interface, to allow In-System
Programming (ISP) of the entire device. This
feature reduces development time, simplifies the
manufacturing flow, and dramatically lowers the
cost of field upgrades. Using ST’s special Fast-
JTAG programming, a design can be rapidly
programmed into the FLASH+PSD.
The innovative FLASH+PSD family solves key
problems faced by designers when managing
discrete Flash memory devices, such as:
– Complex address decoding
– In-System (first-time) Programming (ISP)
– Concurrent EEPROM or Flash memory
programming (IAP).
Table 2. Product Range1
Part Number
Primary Flash
Memory
Secondary NVM SRAM2 I/O Ports Voltage Range Access Time
M8813F1Y
M8813F2Y
M8834F2Y
1 Mbit
1 Mbit
2 Mbit
256 Kbit EEPROM 16 Kbit
27
256 Kbit Flash memory 16 Kbit
27
256 Kbit Flash memory 64 Kbit
27
4.5-5.5 V
90 ns or
150 ns
M8813F1W
1 Mbit
256 Kbit EEPROM 16 Kbit
27
M8813F2W
1 Mbit
256 Kbit Flash memory 16 Kbit
27
2.7-3.6 V
150 ns
M8834F2W
2 Mbit
256 Kbit Flash memory 64 Kbit
27
Note: 1. All products support: JTAG serial ISP, MCU parallel ISP, ISP Flash memory, ISP CPLD, Security features, Power Management
Unit (PMU), Automatic Power-down (APD)
2. SRAM may be backed up using an external battery.
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