AS7C1026A-JC 데이터 시트보기 (PDF) - Alliance Semiconductor
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AS7C1026A-JC Datasheet PDF : 9 Pages
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AS7C1026A
AS7C31026A
®
Read cycle (over the operating range)3,9
Parameter
Read cycle time
Address access time
Chip enable (CE) access time
Output enable (OE) access time
Output hold from address change
CE Low to output in low Z
CE High to output in high Z
OE Low to output in low Z
Byte select access time
Byte select Low to low Z
Byte select High to high Z
OE High to output in high Z
Power up time
Power down time
Symbol
tRC
tAA
tACE
tOE
tOH
tCLZ
tCHZ
tOLZ
tBA
tBLZ
tBHZ
tOHZ
tPU
tPD
-10
Min Max
10 –
– 10
– 10
–3
2–
0–
–3
0–
–3
0–
–5
–3
0–
– 10
-12
Min Max
12 –
– 12
– 12
–3
3–
0–
–3
0–
–3
0–
–6
–3
0–
– 12
-15
-20
Min Max Min Max Unit
15 – 20 – ns
– 15 – 20 ns
– 15 – 20 ns
– 4 – 5 ns
3 – 3 – ns
0 – 0 – ns
– 4 – 5 ns
0 – 0 – ns
– 4 – 5 ns
0 – 0 – ns
– 6 – 8 ns
– 4 – 5 ns
0 – 0 – ns
– 15 – 20 ns
Notes
3
3
5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
Key to switching waveforms
Rising input
Falling input
Undefined output/don’t care
Read waveform 1 (address controlled)3,6,7,9
tRC
Address
tOH
tAA
tOH
DataOUT
Previous data valid
Data valid
Read waveform 2 (OE, CE, UB, LB controlled)3,6,8,9
tRC
Address
tAA
OE
tOE
tOLZ
CE
tACE
tLZ
LB, UB
DataIN
tBA
tBLZ
Data valid
tOH
tOHZ
tHZ
tBHZ
2/6/01; V.0.9
Alliance Semiconductor
P. 4 of 9
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