L7250 데이터 시트보기 (PDF) - STMicroelectronics

부품명

상세내역

제조사

L7250

5V & 12V SPINDLE AND VCM MOTORS DRIVER

STMicroelectronics 

L7250

ELECTRICAL CHARACTERISTCS (continued)

POWER SUPPLY [VCC5 & VCV] VCC5 = 5V ±10%, VCV = 12V ±10%. Tamb = 25°C (unless otherwise specified)

Symbol

Parameter

Test Condition

Min. Typ. Max. Unit

err _clamp High output (clamp) voltage

Isource = 1mA, referred to Vref25 TBD

V

high

VCM OUTPUT DRIVERS

PWR_Gain Power amplifier differential gain. Io = ±1A, Rload = 8Ω

14

15

16

V/V

Rds(on) Total output ON resistance

(Source + Sink)

@ 125°C, I=2A

.9

Ω

PWR_Lkg Output leakage current

600

uA

DiodeFw Clamp diode forward voltage

If = 2A

0.6

1.2

V

THD Total Harmonic Distortion

characterized no tested

1

%

PWR_Slew VCMN or VCMP slew rate

RL = 8 ohms

1

V/us

PWR_B Power Amp -3dB Bandwidth

Driving ERROUT = VDACREF,

250 500

kHz

and

Guaranteed by design

Icross Static Shoot-through current

Guaranteed by design

0

mA

VCM CURRENT CONTROL LOOP STATIC AND DYNAMIC CHARACTERISTICS

IVCMoff Total offset current

Rs=0.2

-75

75

mA

DIVCMoff Total offset current drift

temperature coefficient

Guaranteed by design

.2 mA/oC

Gm_psrr Gm loop VSRR of VCV

-1

1

mA/V

VCM LINEAR DAC

DAC_res Resolution

15

bit

DAC_out Full Scale Output Voltage

wrt VDACREF

0.96

1

1.04

V

DAC_off Mid-Scale Error

wrt VDACREF

-12

12

mV

DAC_DNL Differential Non linearity

Guaranteed Monotonicity

±1

LSB

DAC_INL Integral Non Linearity

±64 LSB

DAC_Co Conversion time

nvT

90% from 3FFFh to 0020h

3

µs

VCM LOAD/UNLOAD

ADC

ADC_res resolution

ADC_DNL Differential Non Linearity

ADC_INL Integral Non Linearity

ADC_Co Conversion time

nvT

10

bit

1

LSB

3

LSB

40

ADC

Clock

cycles

8/46

Share Link: