Q67006-A9306 데이터 시트보기 (PDF) - Infineon Technologies

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Q67006-A9306

5-V Low-Drop Fixed Voltage Regulator

Infineon Technologies 

Pin Configuration

(top view)

P-DIP-8-4

Ι1

SΙ 2

RE 3

D4

8Q

7 SO

6R

5 GND

AEP01813

TLE 4279

P-DSO-8-1

Ι1

SΙ 2

RE 3

D4

8Q

7 SO

6R

5 GND

AEP01668

Pin Definitions and Functions (TLE 4279 A and TLE 4279 G)

Pin No. Symbol Function

1

I

Input; block directly to GND on the IC with a ceramic capacitor.

2

SI

Sense input; if not needed connect to Q.

3

RE

Reset threshold; if not needed connect to ground.

4

D

Reset delay; to select the delay time, connect to GND via

external capacitor.

5

GND

Ground

6

R

Reset output; open-collector output

7

SO

Sense output; open-collector output

8

Q

5-V output; connect to GND with a 10 µF capacitor, ESR < 10 Ω.

Semiconductor Group

2

1998-11-01

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