Q67006-A9306 데이터 시트보기 (PDF) - Infineon Technologies

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Q67006-A9306

5-V Low-Drop Fixed Voltage Regulator

Infineon Technologies 

Pin Configuration

(top view)

P-DSO-20-6

RE 1

D2

N.C. 3

GND 4

GND 5

GND 6

GND 7

N.C. 8

N.C. 9

R 10

20 SΙ

19 Ι

18 N.C.

17 GND

16 GND

15 GND

14 GND

13 N.C.

12 Q

11 SO

AEP01802

TLE 4279

Pin Definitions and Functions (TLE 4279 GL)

Pin No.

Symbol Function

1

RE

Reset threshold; if not needed connect to ground.

2

D

Reset delay; to select delay time connect to GND via

external capacitor.

4-7, 14-17 GND

Ground

10

R

Reset output; open-collector output

11

SO

Sense output; open-collector output

12

Q

Output; connect to GND with 10 µF capacitor, ESR < 10 Ω

19

I

Input; block directly to GND at the IC by a ceramic capacitor

20

SI

Sense input; if not needed connect to Q

Semiconductor Group

3

1998-11-01

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