MAX1020-MAX1023 데이터 시트보기 (PDF) - Maxim Integrated
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MAX1020-MAX1023
Maxim Integrated
MAX1020-MAX1023 Datasheet PDF : 47 Pages
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10-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = 2.7V to 3.6V (MAX1021/MAX1023/MAX1057), external reference VREF = 2.5V (MAX1021/MAX1023/MAX1057), AVDD =
DVDD = 4.75V to 5.25V (MAX1020/MAX1022/MAX1058), external reference VREF = 4.096V (MAX1020/MAX1022/MAX1058), fSCLK = 4.8MHz
(50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at AVDD = DVDD = 3V (MAX1021/MAX1023/MAX1057),
AVDD = DVDD = 5V (MAX1020/MAX1022/MAX1058), TA = +25°C. Outputs are unloaded, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
ADC Positive-Supply Rejection
PSRA
Full-
scale
input
MAX1021/MAX1023/
MAX1057 AVDD = 2.7V to 3.6V
MAX1020/MAX1022/
MAX1058 AVDD = 4.75V to 5.25V
TIMING CHARACTERISTICS (Figures 6–13)
SCLK Clock Period
tCP
40
SCLK Pulse-Width High
tCH 40/60 duty cycle
16
SCLK Pulse-Width Low
tCL 60/40 duty cycle
16
GPIO Output Rise/Fall After
CS Rise
tGOD CLOAD = 20pF
GPIO Input Setup Before CS Fall tGSU
0
LDAC Pulse Width
tLDACPWL
20
SCLK Fall to DOUT Transition
(Note 16)
tDOT
CLOAD = 20pF, SLOW = 0
CLOAD = 20pF, SLOW = 1
1.8
10
SCLK Rise to DOUT Transition
(Notes 16, 17)
tDOT
CLOAD = 20pF, SLOW = 0
CLOAD = 20pF, SLOW = 1
1.8
10
CS Fall to SCLK Fall Setup Time
tCSS
10
SCLK Fall to CS Rise Setup Time
tCSH
0
DIN to SCLK Fall Setup Time
tDS
10
DIN to SCLK Fall Hold Time
tDH
0
CS Pulse-Width High
tCSPWH
50
CS Rise to DOUT Disable
tDOD CLOAD = 20pF
CS Fall to DOUT Enable
tDOE CLOAD = 20pF
1.5
EOC Fall to CS Fall
tRDS
30
CKSEL = 01 (temp sense) or CKSEL =
10 (temp sense), internal reference on
CS or CNVST Rise to EOC Fall
tDOV
CKSEL = 01 (temp sense) or CKSEL =
10 (temp sense), internal reference
initially off
CKSEL = 01 (voltage conversion)
CKSEL = 10 (voltage conversion),
internal reference on
TYP
±0.06
MAX
±0.5
±0.06 ±0.5
100
12.0
40
12.0
40
25
25.0
55
120
8
8
UNITS
mV
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
CNVST Pulse Width
CKSEL = 10 (voltage conversion),
internal reference initially off
CKSEL = 00, CKSEL = 01 (temp sense)
40
tCSW
CKSEL = 01 (voltage conversion)
1.4
80
ns
µs
_______________________________________________________________________________________ 7
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