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MAX2104 데이터 시트보기 (PDF) - Maxim Integrated

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MAX2104 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Direct-Conversion Tuner IC for
Digital DBS Applications
Pin Description (continued)
PIN
NAME
FUNCTION
34
MOD-
PECL Modulus Control. A PECL low on MOD- sets the dual-modulus prescaler to divide by 32. A PECL
logic high sets the divide ratio to 33. Drive with a differential PECL signal with MOD+ (pin 33).
35
PLLIN+ PECL Phase-Locked Loop Input. Drive with a differential PECL signal with PLLIN- (pin 36).
36
PLLIN- PECL Phase-Locked Loop Input. Drive with a differential PECL signal with PLLIN+ (pin 35).
37
PSOUT+
PECL Prescaler Output. Differential output of the dual-modulus prescaler. Used with PSOUT- (pin 38).
Requires PECL-compatible termination.
38
PSOUT-
PECL Prescaler Output. Differential output of the dual-modulus prescaler. Used with PSOUT+ (pin 37).
Requires PECL-compatible termination.
42
TANK- LO Tank Oscillator Input. Connect to an external LC tank with varactor tuning.
43
VRLO LO Internal Regulator. Bypass with a 100pF ceramic chip capacitor to GND.
44
TANK+ LO Tank Oscillator Input. Connect to an external LC tank with varactor tuning.
47
FB
Feedback Output. Control of external charge-pump transistor.
48
CP
Voltage Drive Output. Control of external charge-pump transistor.
EP
Exposed Paddle. Connect EP to GND.
MOD+,
MOD-
PSOUT+
PSOUT-
50%
50%
tSUM
tHM
50%
50%
Figure 1. Timing Diagram
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