MAX2116(2005) 데이터 시트보기 (PDF) - Maxim Integrated
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MAX2116 Datasheet PDF : 15 Pages
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Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
boosts the baseband output gain by 4.5dB, thus allow-
ing the output voltage swing of 1VP-P. Output clipping
levels are typically 2VP-P differential.
DC Offset Compensation IDC± and QDC±
The baseband highpass response is set through a capac-
itor connected between IDC+ and IDC- for the I channel
and QDC+ and QDC- for the Q channel. The 3dB high-
pass bandwidth is determined by the following equation:
F3dB (highpass in Hz) = 1 / (11.75kΩ ✕ C), C in farads
To reduce the potential for baseband spurious pickup,
keep the connection between the DC compensation
capacitors and the IDC± and QDC± pins as short as
possible by placing the capacitors as close to the
device as manufacturing allows.
VREG1 and VREG2
The MAX2116/MAX2118 include two 2.85V voltage reg-
ulator outputs, with a maximum source current rating of
3mA each. These outputs ease the interface to low-volt-
age demodulators by providing a clean pullup termina-
tion for open-drain/collector outputs. VREG1 is located
by the GC1 input control, with VREG2 conveniently
located between the 2-wire interface control pins.
VCO Selection
The MAX2116/MAX2118 include eight fully monolithic
VCOs to cover the entire 925MHz to 2175MHz range.
Maxim has a detailed application note that describes
the operation of the VCO system and proper selection
of the desired VCO. This application note is available by
request from Maxim.
Crystal Output Buffer (XTALOUT)
The on-chip crystal oscillator circuit has been designed
for operation from 4MHz to 27MHz. The crystal output
buffer amplifier is designed to nominally deliver
between 0.75VP-P and 1.5VP-P. However, it might be
necessary to add a resistor between the XTALOUT pin
and ground to increase the signal swing when using
higher frequency crystals (>20MHz). Recommended
values are between 2kΩ and 5kΩ.
Serial Interface and
Control Registers
Programming Bits
The MAX2116/MAX2118 conform to the Philips I2C
standard, 400kbps (fast mode), and operate as a slave.
The MAX2116/MAX2118 have eight read and write
addresses, which are determined by the logic state of the
three address-select pins (AS2, AS1, and AS0). In all
cases, the MSB is transmitted and read first (see Tables
1, 2, 3).
Programming Bit Definition
Byte 00 (Default = 03)
Bit DIV2 controls the VCO frequency divider. High level
= divide-by-2 enabled; low level = divide-by-4 enabled.
Default is DIV2 = 0 (divide-by-4 enabled).
Bits N(14)–N(8) are the 7 upper bits of the 15-bit pro-
grammable N divider, with the default value of N = 950.
The overall VCO divide ratio is:
214 ✕ N(14) + 213 ✕ N(13) … +25 ✕ N(5) + 24 ✕ N(4) + 23 ✕
N(3) … + 20 ✕ N(0)
Byte 01 (Default = B6)
Bits N(7)–N(0) are the 8 lower bits of the 15-bit pro-
grammable N divider.
Table 1. MAX2116/MAX2118 Write Address Byte
AS2
AS1
AS0
MSB
Low
Low
Low
1
1
Low
Low
High
1
1
Low
High
Low
1
1
Low
High
High
1
1
High
Low
Low
1
1
High
Low
High
1
1
High
High
Low
1
1
High
High
High
1
1
ADDRESS BYTE
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
1
0
0
0
1
0
0
0
1
1
0
0
1
1
LSB
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
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