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MAX3264 데이터 시트보기 (PDF) - Maxim Integrated

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MAX3264 Datasheet PDF : 17 Pages
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+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
ELECTRICAL CHARACTERISTICS—MAX3265EUE
(Data outputs terminated per Figure 1, VCC = +3.0V to +5.5V, TA = -40°C to +85°C. Typical values are at VCC = +3.3V, TA = +25°C,
unless otherwise noted.) (Note 1)
PARAMETER
Data Rate
Input Voltage Range
Deterministic Jitter
Random Jitter
Data Output Edge Speed
LOS Hysteresis
LOS Assert/Deassert Time
Low LOS Assert Level
Low LOS Deassert Level
Medium LOS Assert Level
Medium LOS Deassert Level
High LOS Assert Level
High LOS Deassert Level
Squelch Input Current
Differential Input Resistance
Input-Referred Noise
CML Output Voltage
LOS Output High Voltage
LOS Output Low Voltage
Output Signal When Squelched
Power-Supply Rejection Ratio
Low-Frequency Cutoff
Output Resistance (single ended)
Power-Supply Current
CONDITIONS
(Notes 2, 3)
(Notes 2, 4)
(Note 6)
(Notes 2, 7)
(Notes 7, 8)
RTH = 2.5k
RTH = 2.5k
RTH = 7k
RTH = 7k
RTH = 20k
RTH = 20k
IN+ to IN-
LEVEL = open, RLOAD = 50
LEVEL = GND, RLOAD = 75
ILOS = -30µA
ILOS = +1.2mA
Outputs AC-coupled
f < 2MHz
CAZ = open
CAZ = 0.1µF
Figure 2
MIN
10
2.2
2.20
9.9
18.0
0
97
550
1100
2.4
85
TYP
2.5
11
8
100
4.4
1
4.8
8.5
16
27
41.5
67
80
100
230
1270
20
20
2
2
100
50
MAX
1200
25
155
13.6
43.0
111
400
103
1200
1800
0.450
115
76
UNITS
Gbps
mV
psp-p
psRMS
ps
dB
µs
mV
mV
mV
mV
mV
mV
µA
µVRMS
mV
V
V
mV
dB
MHz
kHz
mA
Note 1: Specifications for Input Voltage Range, LOS Assert/Deassert Levels, and CML Output Voltage refer to the total differential
peak-to-peak signal applied or measured. PECL output voltages are absolute (single-ended) voltages measured at a single
output.
Note 2: Input edge speed is controlled using four-pole, lowpass Bessel filters with bandwidth approximately 75% of the maximum
data rate.
Note 3: Deterministic jitter is measured with a K28.5 pattern (0011 1110 1011 0000 0101). Deterministic jitter is the peak-to-peak
deviation from ideal time crossings, measured at the zero-level crossings of the differential output per ANSI X3.230,
Annex A.
Note 4: Random jitter is measured with the minimum input signal applied after filtering with a four-pole, lowpass, Bessel filter (fre-
quency bandwidth at 75% of the maximum data rate). For Fibre Channel and Gigabit Ethernet applications, the peak-to-
peak random jitter is 14.1-times the RMS random jitter.
Note 5: Input signal applied after a 933MHz Bessel filter.
Note 6: Input signal applied after a 1.8GHz Bessel filter.
Note 7: Input for LOS assert/deassert and hysteresis tests is a repeating K28.5 pattern. Hysteresis is defined as:
20log (VLOS-DEASSERT / VLOS-ASSERT).
Note 8: Response time to a 10dB change in input power.
4 _______________________________________________________________________________________

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