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LA4485 데이터 시트보기 (PDF) - SANYO -> Panasonic

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LA4485 Datasheet PDF : 20 Pages
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LA4485
. Insert capacitors of 1000 pF between each input and ground to prevent external noise.
. When the load (RL) or the supply voltage (VCC) is increased, turning the standby switch or the main switch on under strong
input conditions will activate the IC’s internal pseudo ASO protection circuit for the upper power transistor (VCE × ICP). This
causes output oscillations or intermittent operation (The reference area is shown in Figure 1 below). However, strong input tests
after the bias has stabilized have no problems. They also protect the upper power transistors close to the limits of ASO when all
signal switches are on. Therefore, when using this IC under these conditions, the circuit design should obey the following
condition:
Signal generation time > Start-up time of the power amplifier IC
or some other method of attaining the zero-volume condition should be adopted.
. An undervoltage protection circuit operates when the voltage is 7.5 V or lower.
This figure shows the pseudo ASO protection area when strong signal is input, and switch is ON:
the upper power transistors have an area where VCE × ICP load is caused.
PHOTO-2
VCC = 15 V
RL = 3
PHOTO-1
VCC = 13.2 V
RL = 2
Strong signal input after switch-ON is OK.
In BTL-mode operation, the load is RL × 2
RL = 4
Design center
Supply voltage, VCC – V
Figure 1
Dual-mode operation
f = 1 kHz
Dual channel drive
Non-inductive load
Ta = 25°C
Standby switch ON in a
typical application
No.3680-11/20

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