MAX3679 데이터 시트보기 (PDF) - Maxim Integrated
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MAX3679 Datasheet PDF : 11 Pages
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+3.3V, Low-Jitter Crystal to LVPECL
Clock Generator
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, TA = 0°C to +70°C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25°C, unless otherwise
noted.) (Notes 1, 2, and 3)
PARAMETER
SYMBOL
CONDITIONS
REF_IN SPECIFICATIONS (Input DC- or AC-Coupled)
Reference Clock Frequency
PLL enabled
PLL bypassed
Input-Voltage High
Input-Voltage Low
Input High Current
Input Low Current
Reference Clock Duty Cycle
VIH
VIL
IIH
VIN = VCC
IIL
VIN = 0V
PLL enabled
Input Capacitance
QA_C SPECIFICATIONS
Output High Voltage
Output Low Voltage
Output Rise/Fall Time
VOH QA_C sourcing 12mA
VOL QA_C sinking 12mA
(Notes 3 and 6)
Output Duty-Cycle Distortion
PLL enabled
PLL bypassed (Note 5)
Output Impedance
CLOCK OUTPUT AC SPECIFICATIONS
VCO Frequency Range
Random Jitter (Note 7)
12kHz to 20MHz
RJRMS
1.875MHz to 20MHz
Deterministic Jitter Due to
Supply Noise
(Notes 7, 8, 9)
LVPECL output
Spurs Induced by Power-Supply
Noise (Notes 7, 9, 10)
LVPECL output
LVCMOS output
Nonharmonic and Subharmonic
Spurs
Output Skew
Between QB0 and QB1
Between QA and QB0 or QB1,
PECL outputs
MIN TYP MAX UNITS
25
MHz
320
2.0
V
0.8
V
240
μA
-240
μA
30
70
%
2.5
pF
2.6
V
0.4
V
250 500 1000
ps
42
50
58
%
40
60
14
625
0.36
0.14
MHz
1.0
psRMS
5.0
psP-P
-59
dBc
-47
-70
dBc
15
ps
20
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