MAX4503(1996) 데이터 시트보기 (PDF) - Maxim Integrated

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MAX4503
(Rev.:1996)

Low-Voltage, Dual-Supply, SPST, CMOS Analog Switches

Maxim Integrated 

Low-Voltage, Dual-Supply, SPST,

CMOS Analog Switches

______________________________________________________________Pin Description

PIN

MAX4503

MAX4504

NAME

FUNCTION

DIP/SO SOT23-5 DIP/SO SOT23-5

1

1

1

1

COM Analog Switch Common Terminal

2, 3, 5

–

2, 3, 5

–

N.C. No Connect (not internally connected)

4

5

4

5

V+ Positive (analog and digital) Supply Voltage Input

6

4

6

4

IN

Digital Control Input

7

3

7

3

V-

Negative (analog) Supply Voltage Input

8

2

–

–

NO Analog Switch Normally Open Terminal

–

–

8

2

NC Analog Switch Normally Closed Terminal

Note: NO, NC, and COM pins are identical and interchangeable. Either may be considered as an input or output; signals pass

equally well in both directions.

__________Applications Information

Power-Supply Considerations

The MAX4503/MAX4504’s construction is typical of

most CMOS analog switches, except they have only

two supply pins: V+ and V-. These voltages set the

analog voltage limits of the switch. Reverse ESD-pro-

tection diodes are internally connected between IN and

each analog signal pin and both V+ and V-. If any ana-

log signal exceeds V+ or V-, one of these diodes will

conduct. During normal operation, these (and other)

reverse-biased ESD diodes leak, forming the only cur-

rent drawn from V-. Additional current flows through V+

from the logic-level translator.

Virtually all the analog leakage current is provided

through the ESD diodes. Although the ESD diodes on a

given signal pin are identical and therefore fairly well

balanced, they are reverse biased differently. Each is

biased by either V+ or V- and the analog signal. This

means their leakages will vary as the signal varies. The

difference in the two diode leakages to the V+ and V-

pins constitutes the analog-signal-path leakage current.

All analog leakage current flows between each pin and

one of the supply terminals, not to the other switch ter-

minal. This is why both sides of a given switch can

show leakage currents of either the same or opposite

polarity.

There is no connection between the analog signal

paths and V+ or V-.

V+ and V- also power the internal logic and logic-level

translators. Since there is no ground pin, the logic input

has a low-current pull-up to V+ and the logic limit is set

by an internal comparator referenced to V+. The logic-

level translators convert the logic levels to switched V+

and V- signals, to drive the gates of the analog signals.

This drive signal is the only connection between the

logic supplies (and signals) and the analog supplies.

COM, NO, and NC pins have ESD-protection diodes to

V+ and V-.

The logic is CMOS compatible when V+ is +5V. CMOS

compatibility is maintained with all V+ values, assuming

that the CMOS logic is operated from the same V+ sup-

ply. Since the MAX4503/MAX4504 have no ground

pins, the logic levels are internally referenced to V+.

Do not connect the MAX4503/MAX4504 V+ to +3V

and connect the logic-level pins to TTL-logic-level

signals. TTL levels can exceed +3V and violate the

absolute maximum ratings, damaging the part

and/or external circuits.

High-Frequency Performance

In 50Ω systems, signal response is reasonably flat up

to 50MHz. (see Typical Operating Characteristics).

Above 20MHz the on-response has several minor

peaks which are highly layout dependent. The problem

is not in turning the switch on, but in turning it off. The

off-state switch acts like a capacitor, and passes higher

frequencies with less attenuation. At 10MHz, off isola-

tion is about -65dB in 50Ω systems, becoming worse

(approximately 20dB per decade) as frequency

increases. Higher circuit impedances also make off iso-

lation worse.

6 _______________________________________________________________________________________

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