MAX6304ESA 데이터 시트보기 (PDF) - Maxim Integrated

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MAX6304ESA

+5V / Low-Power uP Supervisory Circuits with Adjustable Reset/Watchdog

Maxim Integrated 

+5V, Low-Power µP Supervisory Circuits

with Adjustable Reset/Watchdog

Pin Description

PIN

NAME

FUNCTION

Reset Input. High-impedance input to the reset comparator. Connect this pin to the center point of an

1

RESET IN external resistor voltage-divider network to set the reset threshold voltage. The reset threshold voltage is

calculated as follows: VRST = 1.22 x (R1 + R2)/R2 (see the Typical Operating Circuit).

2

GND

Ground

Set Reset-Timeout Input. Connect a capacitor between this input and ground to select the reset timeout

3

SRT

period (tRP). Determine the period as follows: tRP = 2.67 x CSRT, with CSRT in pF and tRP in µs (see the

Typical Operating Circuit).

Set Watchdog-Timeout Input. Connect a capacitor between this input and ground to select the basic

4

SWT

watchdog timeout period (tWD). Determine the period as follows: tWD = 2.67 x CSWT, with CSWT in pF and

tWD in µs. The watchdog function can be disabled by connecting this pin to ground.

Watchdog-Select Input. This input selects the watchdog mode. Connect to ground to select normal mode

5

WDS

and the basic watchdog timeout period. Connect to VCC to select extended mode, multiplying the basic

timeout period by a factor of 500. A change in the state of this pin resets the watchdog timer to zero.

Watchdog Input. A rising or falling transition must occur on this input within the selected watchdog timeout

period, or a reset pulse will occur. The capacitor value selected for SWT and the state of WDS determine

the watchdog timeout period. The watchdog timer clears and restarts when a transition occurs on WDI or

6

WDI

WDS. The watchdog timer is cleared when reset is asserted and restarted after reset deasserts. In the

extended watchdog mode (WDS = VCC), the watchdog function can be disabled by driving WDI with a

three-stated driver or by leaving WDI unconnected.

RESET changes from high to low whenever the monitored voltage (VIN)

RESET

(MAX6301/

MAX6303)

Open-Drain, Active-Low Reset

Output (MAX6301)

Push-Pull, Active-Low Reset

drops below the selected reset threshold (VRST). RESET remains low as

long as VIN is below VRST. Once VIN exceeds VRST, RESET remains low

for the reset timeout period and then goes high. The watchdog timer

triggers a reset pulse (tRP) whenever the watchdog timeout period (tWD)

Output (MAX6303)

is exceeded.

7

RESET changes from low to high whenever the monitored voltage (VIN)

RESET

(MAX6302/

MAX6304

Open-Drain, Active-High Reset

Output (MAX6302)

Push-Pull, Active-High Reset

drops below the selected reset threshold (VRST). RESET remains high as

long as VIN is below VRST. Once VIN exceeds VRST, RESET remains high

for the reset timeout period and then goes low. The watchdog timer

triggers a reset pulse (tRP) whenever the watchdog timeout period (tWD)

Output (MAX6304)

is exceeded.

8

VCC

Supply Voltage. Bypass to ground with a 0.1µF capacitor placed as close as possible to the pin.

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