MAX6956ATL 데이터 시트보기 (PDF) - Maxim Integrated

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MAX6956ATL

2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or 28-Port LED Display Driver and I/O Expander

Maxim Integrated 

2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or

28-Port LED Display Driver and I/O Expander

SDA

tSU, DAT

tLOW

SCL

tHD, STA

START CONDITION

tHIGH

tR

tF

tHD, DAT

Figure 2. 2-Wire Serial Interface Timing Details

tSU, STA

tHD, STA

REPEATED START CONDITION

tBUF

tSU, STO

STOP CONDITION START CONDITION

SDA

SCL

S

START

CONDITION

Figure 3. Standard Stop Conditions

P

STOP

CONDITION

SDA

SCL

Figure 4. Bit Transfer

DATA LINE STABLE;

DATA VALID

CHANGE OF DATA ALLOWED

has finished communicating with the slave, it issues a

STOP (P) condition by transitioning SDA from low to

high while SCL is high. The bus is then free for another

transmission (Figure 3).

Bit Transfer

One data bit is transferred during each clock pulse.

The data on SDA must remain stable while SCL is high

(Figure 4).

Acknowledge

The acknowledge bit is a clocked 9th bit, which the

recipient uses to handshake receipt of each byte of

data (Figure 5). Thus, each byte transferred effectively

requires 9 bits. The master generates the 9th clock

pulse, and the recipient pulls down SDA during the

acknowledge clock pulse, such that the SDA line is sta-

ble low during the high period of the clock pulse. When

the master is transmitting to the MAX6956, the

MAX6956 generates the acknowledge bit because the

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