MAX9912 데이터 시트보기 (PDF) - Maxim Integrated

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MAX9912

200kHz, 4µA, Rail-to-Rail I/O Op Amps with Shutdown

Maxim Integrated 

200kHz, 4µA, Rail-to-Rail

I/O Op Amps with Shutdown

Power-Supply Considerations

The MAX9910–MAX9913 are optimized for single 1.8V

to 5.5V supply operation. A high amplifier power-supply

rejection ratio of 95dB (typ) allows the devices to be

powered directly from a battery, simplifying design and

extending battery life.

Power-Up Settling Time

The MAX9910–MAX9913 typically require 5µs after

power-up. Supply settling time depends on the supply

voltage, the value of the bypass capacitor, the output

impedance of the incoming supply, and any lead resis-

tance or inductance between components. Op-amp

settling time depends primarily on the output voltage

and is slew-rate limited. Figure 3 shows the MAX991_ in

a noninverting voltage follower configuration with the

input held at midsupply. The output settles in approxi-

mately 18µs for VDD = 3V (see the Typical Operating

Characteristics for power-up settling time).

Shutdown Mode

The MAX9911/MAX9913 feature active-low shutdown

inputs. The MAX9911/MAX9913 enter shutdown in 2µs

(typ) and exit in 30µs (typ). The amplifiers’ outputs are

in a high-impedance state in shutdown mode. Drive

SHDN low to enter shutdown. Drive SHDN high to

enable the amplifier. The MAX9913 dual-amplifier fea-

tures separate shutdown inputs. Shut down both ampli-

fiers for the lowest quiescent current.

Power-Supply Bypassing and Layout

To minimize noise, bypass VDD with a 0.1µF capacitor

to ground, as close to the pin as possible.

Good layout techniques optimize performance

by decreasing the amount of stray capacitance and

inductance to the op amps’ inputs and outputs.

Minimize stray capacitance and inductance by placing

external components close to the IC.

RAIL-TO-RAIL OUTPUT VOLTAGE RANGE

3V

IN_

1V/div

0V

3V

OUT_

1V/div

0V

200µs/div

Figure 1. Rail-to-Rail Output Voltage Range

MAX9910–

MAX9913

RISO

RL

CL

AV =

RL

RL + RISO

≈ 1V/V

Figure 2. Using a Resistor to Isolate a Capacitive Load from

the Op Amp

5.5V

0V

IN-

VDD

100kΩ

MAX991_

OUT

IN+

VSS

100kΩ

Figure 3. Power-Up Test Configuration

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