MAX9875 데이터 시트보기 (PDF) - Maxim Integrated

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MAX9875

Low RF Susceptibility, Mono Audio Subsystem with DirectDrive Headphone Amplifier

Maxim Integrated 

Low RF Susceptibility, Mono Audio

Subsystem with DirectDrive Headphone Amplifier

ELECTRICAL CHARACTERISTICS (continued)

(VDD = VPVDD = 3.7V, VGND = VPGND = 0V. Single-ended inputs, preamp gain = 0dB, volume controls = 0dB, OSC = 00, SHDN = 1.

Speaker loads (ZSPK) connected between OUT+ and OUT-. Headphone loads (RHP) connected from HPL or HPR to GND. SDA and

SCL pullup voltage = 3.3V. ZSPK = ∞, RHP = ∞. C1 = C2 = CBIAS = 1µF. TA = TMIN to TMAX, unless otherwise noted. Typical values are

at TA = +25°C.) (Note 3)

PARAMETER

Slew Rate

SYMBOL

SR

CONDITIONS

MIN TYP MAX UNITS

0.35

V/µs

Capacitive Drive

Crosstalk

CL

100

pF

HPL to HPR, HPR to HPL, f = 20Hz to 20kHz

65

dB

Charge-Pump Frequency

VOLUME CONTROL

Spread-spectrum modulation mode,

OSC = 00

Fixed-frequency mode, OSC = 01

Fixed-frequency mode, OSC = 10

588

±30

kHz

430

550

670

220

350

500

Minimum Setting

Maximum Setting

Preamp Gain

_VOL = 1

_VOL = 31

Input A or B

PGAIN_ = 00

PGAIN_ = 01

-75

dB

0

dB

0

9

dB

Mute Attenuation

f = 1kHz, _VOL = 0

PGAIN_ = 10

Speaker

Headphone

20

100

dB

110

Zero-Crossing Detection Timeout

ZCD = 1

60

ms

DIGITAL INPUTS

Input-Voltage High (SDA, SCL)

VH

Input-Voltage Low (SDA, SCL)

VL

Input-Voltage Low (BIAS)

VBL

Input Hysteresis (SDA, SCL)

VHYS

SDA, SCL Input Capacitance

CIN

Input Leakage Current

IIN

BIAS Pullup Current

IBIAS

DIGITAL OUTPUTS (SDA Open Drain)

SDA, SCL; TA = +25°C

1.4

V

0.4

V

0.15

V

80

mV

4

pF

±1.0

µA

94

µA

Output Low Voltage SDA

Output Fall Time SDA

2-WIRE INTERFACE TIMING

VOL

ISINK = 3mA

tOF

VH(MIN) to VL(MAX) bus capacitance = 10pF

to 400pF, ISINK = 3mA

0.4

V

250

ns

External Pullup Voltage Range:

SDA and SCL

1.7

3.6

V

Serial Clock Frequency

fSCL

Bus Free Time Between STOP

and START Conditions

tBUF

DC

400

kHz

1.3

µs

START Condition Hold

START Condition Setup Time

Clock Low Period

Clock High Period

tHD:STA

tSU:STA

tLOW

tHIGH

0.6

µs

0.6

µs

1.3

µs

0.6

µs

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