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MAXQ1004-B01 데이터 시트보기 (PDF) - Maxim Integrated

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MAXQ1004-B01
MaximIC
Maxim Integrated MaximIC
MAXQ1004-B01 Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
1-Wire and SPI Authentication Microcontroller
ABSOLUTE MAXIMUM RATINGS
Voltage Range on All Pins (including VDD),
except DQ to GND............................................-0.5V to +3.6V
Voltage Range on DQ Relative to GND................-0.5V to +6.0V
Continuous Output Current
Any Single I/O Pin............................................................35mA
All I/O Pins Combined.....................................................35mA
Continuous Power Dissipation (TA = +70NC)
Single-Layer Board (derate 16.9mW/NC above +70NC).. 1349.1mW
Multilayer Board (derate 25mW/NC above +70NC).....2000mW
Operating Temperature Range........................... -40NC to +85NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
(VDD = 1.7V to 3.6V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC and VDD = 3.3V, unless oth-
erwise noted.) (Note 1)
PARAMETER
Supply Voltage
1.8V Internal Regulator
Power-On Reset Voltage
Power-Fail Reset Voltage
Power-Fail Warning Voltage
Digital Overvoltage Detect
Supply Current (Note 5)
Stop-Mode Current (Note 5)
DIGITAL I/O
SYMBOL
VDD
VREG18
VPOR
VRST
VPFW
VHV
IDD1
IDD2
ISTOP1
ISTOP2
ISTOP3
ISTOP4
CONDITIONS
(Note 2)
(Notes 3, 4)
Monitors VREG18
Device is executing fSYS = 6MHz
from flash
fSYS = 1MHz
TA = +25NC, CPU not backed up
TA = +85NC, CPU not backed up
TA = +25NC, CPU backed up
TA = +85NC, CPU backed up
MIN
VRST
1.62
1.0
1.64
1.75
2.4
TYP
3.3
1.8
0.8
MAX
3.6
1.98
1.42
1.695
1.85
2.8
3.5
5
7.5
6.5
9
UNITS
V
V
V
V
V
V
mA
FA
Input High Voltage (P0, RST)
Input Hysteresis
Input Low Voltage (P0, RST)
Output Low Voltage (P0, RST)
(Note 7)
Output High Voltage (P0, RST)
VIH
0.7 x
VDD
VDD
V
VIHYS
(Note 6)
0.3
V
VIL
VGND
0.3 x
VDD
V
VOL
VDD = 3.6V, IOL = 4mA (Note 6)
VDD = 1.85V, IOL = 4mA
0.4
V
0.4
VOH
IOH = -2mA
VDD -
0.4
VDD
V
Input Leakage Current
Input/Output Pin Capacitance
Input Low Current for All Pins
RST Pullup Resistor
IL
CIO
IIL
RRST
Internal pullup disabled
(Note 6)
VIN = 0.4V, pullup enabled
-100
+100
nA
15
pF
-70
FA
65
Q20%
kI
4

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