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MB88347L 데이터 시트보기 (PDF) - Fujitsu

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MB88347L Datasheet PDF : 16 Pages
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MB88347L
s DATA CONFIGURATION
The MB88347L has a 12-bit shift register for chip control.
The 12-bit shift register must be used to set up data in the configuration shown below.
The data configuration has a total of 12 bits, for address selection and eight for D/A data output.
Last
First
LSB
MSB
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D/A output bits
Address selection bits
• D/A converter control signals
D0
D1
D2
D3
D4
D5
D6
D7
D/A data output
0
0
0
0
0
0
0
0
VSS
1
0
0
0
0
0
0
0
VLB × 1 + VSS
0
1
0
0
0
0
0
0
VLB × 2 + VSS
0
1
1
1
1
1
1
1
VLB × 254 + VSS
1
1
1
1
1
1
1
1
VLB × 255 + VSS
Note: VLB = (VDD – VSS)/256
• Address selection signals
D8
D9
D10
D11
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
Address selection
Don’t Care
AO1 Selection
AO2 Selection
AO3 Selection
AO4 Selection
AO5 Selection
AO6 Selection
AO7 Selection
AO8 Selection
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
4

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