MB89485P-SH 데이터 시트보기 (PDF) - Fujitsu
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MB89485P-SH Datasheet PDF : 55 Pages
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MB89480/480L Series
(Continued)
Part number
MB89485L
Parameter
MB89485 MB89P485L MB89P485
MB89PV480
A/D converter
10-bit resolution × 4 channels.
A/D conversion function (conversion time: 60 tinst ).
Supports repeated activation by internal clock.
Common output
Segment output
LCD controller/driver Bias power supply pins
LCD display RAM size
Dividing resistor/booster
: 4 (Max)
: 31 (Max) (selected resistor ladder)
: 26 (Max) (selected booster)
:4
: 31 × 4 bits
: selected by mask option
UART/SIO
Buzzer output
Synchronous/asynchronous data transfer capability.
(Max baud rate: 97.656 Kbps at 12.5 MHz).
(7 and 8 bits with parity bit; 8 and 9 bits without parity bit).
7 frequencies are selectable by software.
Standby mode
Sleep mode, stop mode, watch mode, sub-clock mode.
Process
Operating voltage
CMOS
2.2 V to 3.6 V 2.2 V to 5.5 V 2.7 V to 3.6 V 3.5 V to 5.5 V
2.7 V to 5.5 V
*1 : Use MBM27C256A as the external ROM.
*2 : Read protection feature is selected by part number, detail please refer to MASK OPTIONS.
Note : 1 tinst = one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock.
s PACKAGE AND CORRESPONDING PRODUCTS
Package
Part number
DIP-64P-M01
FPT-64P-M09
MDP-64C-P02
MQP-64C-P01
O : Availabe
X : Not available
MB89485/485L
O
O
X
X
MB89P485/P485L
O
O
X
X
MB89PV480
X
X
O
O
4
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