MB89490 데이터 시트보기 (PDF) - Fujitsu

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MB89490

8-bit Proprietary Microcontroller

Fujitsu 

MB89490 Series

(Continued)

• F2MC-8L family CPU core

Instruction set optimized for controllers

Multiplication and division instructions

16-bit arithmetic operations

Test and branch instructions

Bit manipulation instructions, etc.

• Clock

Embedded PLL clock multiplication circuit for sub-clock

Operating clock (PLL for sub-clock) can be selected four times of the sub-clock oscillation

• Six timers

PWM timer x 2

8/16-bit timer/counter x 2

21-bit timebase timer

Watch prescaler

• External interrupt

Edge detection (selectable edge) : 8 channels

Low level interrupt (wake-up function) : 8 channels

• 10-bit A/D converter (8 channels)

10-bit successive approximation type

• UART/SIO

Synchronous/asynchronous data transfer capability

• SIO

Synchronous data transfer capability

• LCD controller/driver

Max. 32 segments output x 4 commons

• I2C interface circuit

• Remote receiver circuit

• Low-power consumption mode

Stop mode (oscillation stops so as to minimize the current consumption.)

Sleep mode (CPU stops so as to reduce the current consumption to approx. 1/3 of normal.)

Watch mode (everything except the watch prescaler stops so as to reduce the power comsumption to an

extremely low level.)

Sub-clock mode

• Watchdog timer reset

• I/O ports: max. 66channels

■ PRODUCT LINEUP

Part number

Parameter

MB89497

MB89498

MB89F499

MB89PV490

Classification

Mass production products

(mask ROM product)

FLASH

Piggy-back

ROM size

32K x 8-bit

48K x 8-bit 60K x 8-bit (internal FLASH) 60K x 8-bit (external ROM)*1

(internal ROM) (internal ROM)

RAM size

1K x 8-bit

2K x 8-bit

2K x 8-bit

2K × 8-bit

*1 : Use MBM27C512 as the external ROM.

2

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