MB89560H 데이터 시트보기 (PDF) - Fujitsu

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MB89560H

8-bit Proprietary Microcontroller

Fujitsu 

MB89560H Series

Part number

Parameter

MB89567H

MB89567HC

MB89P568

MB89PV560

PWC timer

8-bit timer operation (count clock cycle: 1, 4, 32 tinst)

8-bit reload timer operation (toggle output possible, operating clock cycle: 1 - 32 tinst)

8-bit pulse width measurement (continuous measurement possible: High and Low widths, H to H, L

to L, period & H at same time and High & rising to rising)

10-bit A/D con-

verter*2

10-bit resolution × 8 channels

A/D conversion function (conversion time: 60 tinst)

Continuous activation by an 8/16-bit timer/counter output or a timebase timer output capable.

6 bit PPG

Internal 6-bit counter

Pulse width and cycle are program selectable

12 bit PPG

Internal 12-bit counter

Pulse width and cycle are program selectable

I2C interface*4

Not

Available

1 channel

Use a 2-wire protocol to communicate with other device

High speed UART

Transfer data length: 4, 6, 7, 8 bits

Transfer rate (300 to 192000 bps /10 MHz main clock)

support sub-clock mode

UART/SIO

Transfer data length: 7, 8 bits for UART, 8 bits for SIO

Transfer rate (1201 to 78125 bps / 10 MHz main clock)

support sub-clock mode

8-bit serial I/O

8 bits, LSB first/MSB first selectability

One clock selectable from four transfer clocks (one external shift clock, three internal shift clocks:

2, 8, 32 tinst)

LCD

Common output: 4 (max.)

Segment output: 24 (max.)

LCD driving power (bias) pins: 4

LCD display RAM size: 12 bytes (24 × 4 bits, max. 96 pixels)

Duty LCD mode and Static LCD mode

Booster for LCD driving: option

Dividing resister for LCD driving: Built-in*1

Wild register

Maximum of 6-byte data can be assigned in 6 different address.

Used to replace any data in the ROM when specific address and data are assigned in Wild register.

Wild register can be set up by using different communication methods through the device.

External interrupt 1

(wake-up function)

8 independent channels (interrupt vector, request flag, request output enable)

Edge selectability (rising/falling)

Used also for wake-up from stop/sleep mode. (edge detection is also permitted in stop mode.)

External interrupt 2 4 channels (“L” level interrupts, independent input enable).

(wake-up function) Used also for wake-up from stop/sleep mode. (Low-level detection is also permitted in stop mode.)

Standby mode

Sleep mode, stop mode and clock mode

Process

CMOS

Operating voltage*

3.5 V to 5.5 V

3.5 V to 5.5 V

2.7 to 5.5 V

2.7 to 5.5 V*3

* :Varies with conditions such as the operating frequency. (See “s Electrical Characteristics.”)

*1 : When booster is used, the bias is reduced by 1/3. it can be selected by mask option.

*2 : When the A/D converter is used, operating voltage must be 3.5V to 5.5V.

*3 : Use MBM27C512-20 as the external ROM (operating voltage: 4.5 V to 5.5 V)

*4 : I2C is complied to Intel Corp. System Management Bus Rev. 1.0 specification and to the Philips I2C specification.

*5 : 1 tinst = one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock if main

clock mode is selected , or 1/2 of the subclock if subclock mode is selected

3

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