MB90570A 데이터 시트보기 (PDF) - Fujitsu

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MB90570A

16-bit Proprietary Microcontroller

Fujitsu 

MB90570A/570C Series

■ BLOCK DIAGRAM

X0, X1

X0A,

RST

HS

Main clock

Sub clock

P00/AD00 to P07/

8

P10/AD08 to P17/AD15

8

P20/A16 to P27/A23

8

P30/ALE

P31/RD

P32/WRL

P33/WRH

P34/HRQ

P35/

P36/RDY

P37/CLK

P40/SIN0

P41/SOT0

P42/SCK0

P43/SIN1

P44/SOT1

P45/SCK1

P46/

P47/PPG1

P50/SIN2

P51/SOT2

P52/SCK2

P53/SIN3

P54/SOT3

P55/SCK3

P56/IN0

P57/IN1

4

P64/OUT0 to P67/OUT3

P60/SIN4

P61/SOT4

P62/SCK4

P63/CKOT

Other pins

MD0 to MD2,

C, VCC, VSS

DS07-13701-9E

F2MC–16LX

CPU

Clock control

block

(including timebase

timer)

Port 0, 1, 2

16

8

2 External bus

6 interface

Port 3

Port 4

2

UART0

2

(SCI),

2

UART1

(SCI)

8/16-bit

PPG timer

ch.0

Port 5

2

2 SIO × 2 ch

2

2 Input capture

Interrupt controller

3

Port 7

P70 to P72

2

8-bit

D/A

converter

× 2 ch.

P73/DA0

P74/DA1

DVCC

DVSS

Port 9

Chip select 8

output

Port A

8/16-bit up/down 6

counter/timer

8

P90/CS0 to P97/CS7

PA1/BIN0

PA2/ZIN0

PA3/AIN1/IRQ7

PA4/BIN1

PA5/ZIN1

2

I2C bus

DTP/

external

interrupt 6

circuit

PA6/SDA

PA7/SCL

PA0/AIN0/IRQ6

6 PB0/IRQ0 to

PB5/IRQ5

Port B

8/10-bit

A/D converter

× 8 ch.

8

Port 8

Port C

PB7

PB6/ADTG

AVR

AVR

AVCC

8

AVSS

P80/AN0 to

P87/AN7

4 PC0 to PC3

16-bit free run timer

4 Output

compare

(OCU)

SIO × 1 ch.

RAM

ROM

Port 6

Clock output

P00 to P07 (8 ports): Provided with a register optional input pull-up resistor

P10 to P17 (8 ports): Provided with a register optional input pull-up resistor

P40 to P47 (8 ports): Heavy-current (IOL = 10 mA) port

P60 to P67 (8 ports): Provided with a register optional input pull-up resistor

19

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