MB91354A 데이터 시트보기 (PDF) - Fujitsu

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MB91354A

32-Bit Proprietary Microcontroller

Fujitsu 

MB91350A Series

• Sub clock select

Immediately after switching from main clock mode to subclock mode for the clock source, insert at least one

NOP instruction.

(ldi #0x0b, r0)

(ldi #_CLKR, r12)

stb r0, @r12

// sub-clock mode

nop

// Must insert NOP instruction

• Bit Search Module

The BSD0, BSD1, and BDSC registers are accessed only in words.

• D-bus memory

Do not allocate the code area in memory on the D-bus because no instruction fetch takes place to the D-bus.

Executing an instruction fetch to the D-bus area causes wrong data to be interpreted as code, possibly letting

the device to run out of control.

• Low Power Consumption Mode

To enter the sleep or stop mode, be sure to read the standby control register (STCR) immediately after writing to it.

Precisely, use the following sequence.

Set the I flag, ILM, and ICR to, after returning from standby mode, branch to the interrupt handler having caused

the device to return.

(ldi #value_of_standby, r0)

(ldi #_STCR, r12)

stb r0, @r12

// set STOP/SLEEP bit

ldub @r12, r0

// Must read STCR

ldub @r12, r0

// after reading, go into standby

mode

nop

// Must insert NOP *5

nop

nop

nop

nop

• Switch shared port function

To switch between the use as a port and the use as a dedicated pin, use the port function register (PFR). Note,

however, that bus pins are switched depending on external bus settings.

• Pre-fetch

When accessing a prefetch-enabled little endian area, be sure to use word access (in 32-bit, word length) only.

Byte or halfword access results in wrong data read.

• I/O port access

Ports are accessed only in bytes.

• Built-in RAM

Immediately after a reset is canceled, the internal RAM allocation restricting function is still working, allowing

only 4 KB to be used for data and for program execution irrespective of the on-chip RAM capacity.

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