MB91354A 데이터 시트보기 (PDF) - Fujitsu

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MB91354A

32-Bit Proprietary Microcontroller

Fujitsu 

MB91350A Series

• Flash memory

In programming mode, Flash memory cannot be used as an interrupt vector table. A reset is possible.

• Notes on the PS register

As the PS register is processed by some instructions in advance, exception handling below may cause the

interrupt handling routine to break when the debugger is used or the display contents of flags in the PS register

to be updated.

As the microcontroller is designed to carry out reprocessing correctly upon returning from such an EIT event, it

performs operations before and after the EIT as specified in either case.

1. The following operations are performed when the instruction followed by a DIVOU/DIVOS instruction results in:

(a) acceptance of a user interrupt or NMI, (b) single-stepping, or (c) a break at a data event or emulator menu.

• The D0 and D1 flags are updated in advance.

• An EIT handling routine (user interrupt, NMI, or emulator) is executed.

• Upon returning from the EIT, the DIVOU/DIVOS instruction is executed and the D0 and D1 flags are

updated to the same values as in (1).

2. The following operations are performed when the ORCCR/STILM/MOVRi and PS instructions are executed.

• The PS register is updated in advance.

• An EIT handling routine (user interrupt, NMI, or emulator) is executed.

• Upon returning from the EIT, the above instructions are executed and the PS register is updated to the

same value as in (1).

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