MB91350A Series
■ MEMORY SPACE
1. Memory space
The FR family has 4 GB of logical address space (232 addresses) available to the CPU by linear access.
• Direct Addressing Areas
The following address space areas are used as I/O areas.
These areas are called direct addressing areas, in which the address of an operand can be specified directly
during an instruction.
The size of directly addressable areas depends on the length of the data being accessed as shown below.
→ byte data access
: 000H to 0FFH
→ half word data access : 000H to 1FFH
→ word data access : 000H to 3FFH
2. Memory Map
• Memory map of MB91F355A/MB91355A
Single chip mode
0000 0000H
0000 0400H
0001 0000H
0003 E000H
0004 0000H
0004 4000H
0005 0000H
0008 0000H
0010 0000H
FFFF FFFFH
I/O
I/O
Access
disallowed
Built-in RAM 8 KB
(Executable)
Built-in RAM 16 KB
(Stack)
Access
disallowed
Built-in RAM
512 KB
Access
disallowed
Internal ROM
external bus mode
I/O
I/O
Access
disallowed
Built-in RAM 8 KB
(Executable)
Built-in RAM 16 KB
(Stack)
Access
disallowed
External area
Built-in RAM
512 KB
External area
External ROM
external bus mode
I/O
Direct
addressing area
I/O
Refer to “3. I/O Map”
Access
disallowed
Built-in RAM 8 KB
(Executable)
Built-in RAM 16 KB
(Stack)
Access
disallowed
External area
• Each mode is set depending on the mode vector fetch after INIT is negated.
• The MB91V350A uses the area of 512 KB of internal ROM as emulation RAM in the MB91355A memory map.
The internal RAM (Instruction) has been expanded from 8 KB to 16 KB.
• The available area of internal RAM is restricted immediately after a reset is canceled. When the setting of the
available area is updated, the instruction must be followed by at least 1 NOP instruction.
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