MB91350A Series
3. I/O Map
This shows the location of the various peripheral resource registers in the memory space.
(How to read the table)
Address
000000H
Register
+0
+1
+2
+3
PDR0 [R/W] B PDR1 [R/W] B PDR2 [R/W] B PDR3 [R/W] B
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
Block diagram
T-unit
Port Data Register
Read/write attribute, Access unit
(B : Byte, H : Half Word, W : Word)
Initial value after a reset
Register name (First-column register at address 4n, second-column register at
address 4n + 2)
Location of left-most register (When using word access, the register in column
1 is in the MSB side of the data.)
Note : Initial values of register bits are represented as follows :
“1” : Initial value is “1”.
“0” : Initial Value: “0”.
“X” : Initial value is “X”.
“−” : No physical register at this location
Address
000000H
000004H
000008H
00000CH
000010H
000014H
000018H
00001CH
000020H
000024H
Register
+0
+1
+2
⎯
⎯
PDR2 [R/W] B
XXXXXXXX
PDR4 [R/W] B
XXXXXXXX
PDR5 [R/W] B
XXXXXXXX
PDR6 [R/W] B
XXXXXXXX
PDR8 [R/W] B
- - XXXXXX
PDR9 [R/W] B
- - - XXXXX
PDRA [R/W] B
- - - - XXXX
PDRC [R/W] B
- - - - - XXX
⎯
PDRG[R/W] B
- - XXXXXX
PDRH [R/W] B
- - XXXXXX
PDRI [R/W] B
- - XXXXXX
PDRK [R/W] B
XXXXXXXX
PDRL [R/W] B
- - - - - - XX
PDRM [R/W] B
- - XXXXXX
PDRO [R/W] B
XXXXXXXX
PDRP [R/W] B
- - - - XXXX
⎯
⎯
⎯
⎯
⎯
SMCS5 [R/W] B, H*3
00000010 - - - - 00 - -
SES5 [R/W] B*3
- - - - - - 00
+3
PDR3 [R/W] B
XXXXXXXX
⎯
PDRB [R/W] B
XXXXXXXX
Block
diagram
T-unit
Port Data
Register
PDRJ [R/W] B
XXXXXXXX
PDRN [R/W] B
- - XXXXXX
⎯
R-bus
Port Data
Register
⎯
SDR5 [R/W] B*3
XXXXXXXX
Reserved
SIO 5*3
(Continued)
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