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MB91352APMT 데이터 시트보기 (PDF) - Fujitsu

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MB91352APMT
Fujitsu
Fujitsu Fujitsu
MB91352APMT Datasheet PDF : 139 Pages
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MB91350A Series
• On-chip multiplier supported at the instruction level.
Signed 32-bit multiplication : 5 cycles
Signed 16-bit multiplication : 3 cycles
• Interrupt (PC, PS save) : 6 cycles, 16 priority levels
• Harvard architecture allowing program access and data access to be executed simultaneously
• Instructions compatible with the FR family
2. Bus interface
• Maximum operating frequency : 25 MHz
• 24-bit address full output (16 Mbyte address space) capability
(21-bit address full output (2 Mbyte address space) capability : MB91F353A/353A/352A/351A)
• 8,16-bit data output
• Built-in prefetch buffer
• Unused data and address pins can be used as general I/O ports.
• Able to output chip-select for 4 completely independent areas that can be configured in units of 64 Kbytes
• Support for various memory interfaces :
SRAM, ROM/Flash
page mode Flash ROM, page mode ROM interface
• Basic bus cycle : 2 cycles
• Programmable automatic wait cycle generator capable of inserting wait cycles for each area
• RDY input for external wait cycles
• DMA support of fly-by transfer capable of wait control for independent I/O
(The MB91F353A/353A/352A/351A does not support fly-by transfer.)
3. Built-in memory
D-bus memory
MB91F353A
MB91V350A MB91F355A MB91F356B
MB91F357B
MB91353A
MB91355A
ROM
No
512 Kbytes 256 Kbytes 512 Kbytes
RAM (Stack)
16 Kbytes 16 Kbytes 16 Kbytes 16 Kbytes
RAM (Execute instruction) 16 Kbytes 8 Kbytes 8 Kbytes 8 Kbytes
MB91352A
MB91354A
384 Kbytes
8 Kbytes
8 Kbytes
MB91351A
384 Kbytes
16 Kbytes
8 Kbytes
4. DMAC (DMA Controller)
• Capable of simultaneous operation of up to 5 channels (external external : 3 channels)
• 3 transfer sources (external pin, internal peripheral or software) :
Activation sources are software-selectable (transfer can be activated by UART0/1/2).
• Addressing using 32-bit full addressing mode (increment, decrement, fixed)
• Transfer modes (demand transfer, burst transfer, step transfer, block transfer)
• Fly-by transfer support (between external I/O and memory)
• Selectable transfer data size : 8, 16, or 32-bit
• Multi-byte transfer capability (selected by software)
• DMAC descriptor in IO areas (200H to 240H, 1000H to 1024H)
(The MB91F353A/353A/352A/351A does not have an external interface.)
External pin transfer is not supported. Demand transfer and fly-by transfer cannot be used.
5. Bit search module (for REALOS)
• Search a single word starting from the MSB for the position of the first bit changed from 1 to 0.
(Continued)
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