MC100LVEL33D 데이터 시트보기 (PDF) - ON Semiconductor

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MC100LVEL33D

3.3V ECL ÷4 Divider

ON Semiconductor 

MC100LVEL33

Table 5. AC CHARACTERISTICS VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −3.3 V (Note 7)

−40°C

25°C

85°C

Symbol

Characteristic

Min Typ Max Min Typ Max Min Typ Max Unit

fmax

Maximum Toggle Frequency

3.4

3.8 4.0

3.8

GHz

tPLH

Propagation Delay

tPHL

CLK to Q (Diff) 530 630 730 570 670 770 650 750 850

CLK to Q (SE) 530 655 780 570 695 820 650 775 900

Reset to Q 500

700 520

720 580

780 ps

tRR

tskew

tJITTER

VPP

Reset Recovery

Duty Cycle Skew (Note 8)

Cycle−to−Cycle Jitter

Input Voltage Swing

(Differential Configuration)

300

300

300

ps

20

20

20

ps

0.5 <1.0

0.5 <1.0

0.5 <1.0 ps

150

1000 150

1000 150

1000 mV

tr

Output Rise/Fall Times Q

tf

(20% − 80%)

120

320 120

320 120

320 ps

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

7. VEE can vary ±0.3 V.

8. Duty cycle skew is the difference between TPLH and TPHL.

CLK

RESET

Q

Figure 1. Timing Diagram

Q

Driver

Device

Q

Zo = 50 W

Zo = 50 W

50 W

50 W

D

Receiver

Device

D

VTT

VTT = VCC − 3.0 V

Figure 2. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D − Termination of ECL Logic Devices.)

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