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MC100LVEL34 데이터 시트보기 (PDF) - ON Semiconductor
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MC100LVEL34
3.3V ECL ÷2, ÷4, ÷8 Clock Generation Chip
ON Semiconductor
MC100LVEL34 Datasheet PDF : 10 Pages
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Q
Driver
Device
Q
MC100LVEL34
B
4 / 8
B
2
JITTER
OUT
ps (RMS)
500
1000
FREQUENCY (MHz)
Figure 4. F
max
/Jitter
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4
3
2
1
1500
Z
o
= 50
W
Z
o
= 50
W
50
W
50
W
D
Receiver
Device
D
V
TT
V
TT
= V
CC
−
2.0 V
Figure 5. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D
−
Termination of ECL Logic Devices.)
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