MC10ELT21, MC100ELT21
NC 1
D0 2
D0 3
PECL
8 VCC
TTL 7 Q0
6 NC
VBB 4
5 GND
Figure 1. 8−Lead Pinout and Logic Diagram
(Top View)
Table 1. PIN DESCRIPTION
Pin
Function
Q0
TTL Outputs
D0, DO
PECL Differential Outputs
VBB
VCC
GND
Reference Voltage Output
Positive Supply
Ground
NC
No Connect
EP
Exposed pad must be connected to a
sufficient thermal conduit. Electrically
connect to the most negative supply or
leave floating open.
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−8
TSSOP−8
DFN8
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
50 kW
N/A
> 2 kV
Pb Pkg
Pb−Free Pkg
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
UL 94 V−0 @ 0.125 in
81 Devices
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Power Supply
VIN
PECL Input Voltage
IBB
VBB Sink/Source
TA
Operating Temperature Range
GND = 0 V
GND = 0 V
VI VCC
7
V
0 to 6
V
± 0.5
mA
−40 to +85
°C
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
SOIC−8
SOIC−8
−65 to +150
190
130
°C
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
SOIC−8
TSSOP−8
TSSOP−8
41 to 44
185
140
°C/W
°C/W
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
DFN8
DFN8
129
°C/W
84
°C/W
Tsol
Wave Solder
Pb <2 to 3 sec @ 248°C
Pb−Free <2 to 3 sec @ 260°C
265
°C
265
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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